Matthew Simpson 953d7312ee [SLP] Fix sign-extends for type-shrinking ...

This patch ensures the correct minimum bit width during type-shrinking.
Previously when type-shrinking, we always sign-extended values back to their
original width. However, if we are going to sign-extend, and the sign bit is
unknown, we have to increase the minimum bit width by one bit so the
sign-extend will fill the upper bits correctly. If the sign bit is known to be
zero, we can perform a zero-extend instead. This should fix PR31243.

Reference: https://llvm.org/bugs/show_bug.cgi?id=31243
Differential Revision: https://reviews.llvm.org/D27466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289470 91177308-0d34-0410-b5e6-96231b3b80d8

2016-12-12 21:11:04 +00:00

..

AArch64

[SLP] Avoid signed integer overflow

2016-08-23 20:48:50 +00:00

AMDGPU

[SLPVectorizer] Try different vectorization factors for store chains

2015-07-08 23:40:55 +00:00

ARM

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

PowerPC

[SLP] Pass in correct alignment when query memory access cost

2016-05-31 20:41:19 +00:00

X86

[SLP] Fix sign-extends for type-shrinking

2016-12-12 21:11:04 +00:00

XCore

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00