mirror of
https://github.com/RPCS3/llvm.git
synced 2026-01-31 01:25:19 +01:00
6404850444
We may have subregister defs which are unused but not discovered and cleaned up prior to liveness analysis. This creates multiple connected components in the resulting live range which are forbidden in the MachineVerifier because they would unnecesarily constrain the register allocator. Rewrite those dead definitions to define a newly created virtual register. Differential Revision: http://reviews.llvm.org/D13035 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248335 91177308-0d34-0410-b5e6-96231b3b80d8
+==============================================================================+
| How to organize the lit tests |
+==============================================================================+
- If you write a test for matching a single DAG opcode or intrinsic, it should
go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)
- If you write a test that matches several DAG opcodes and checks for a single
ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
bfi_int.ll
- For all other tests, use your best judgement for organizing tests and naming
the files.
+==============================================================================+
| Naming conventions |
+==============================================================================+
- Use dash '-' and not underscore '_' to separate words in file names, unless
the file is named after a DAG opcode or ISA instruction that has an
underscore '_' in its name.