Dylan McKay b6377293f2 [AVR] Set trackLivenessAfterRegAlloc ...

This sets trackLivenessAfterRegAlloc on AVRRegisterInfo.

Most existing targets set this flag. Without it, specific IR inputs
cause LLVM to fail with:

Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) &&
                   "Liveness information is accurate"), function livein_begin
file MachineBasicBlock.cpp, line 1354.

With this commit, this no longer happens.

Patch by Peter Nimmervoll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334409 91177308-0d34-0410-b5e6-96231b3b80d8

2018-06-11 14:46:48 +00:00

..

atomics

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

calling-conv/c

[AVR] Save/restore the frame pointer for all functions

2017-05-02 01:57:48 +00:00

features

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

inline-asm

[AVR] Reserve the Y register in all functions

2017-05-03 11:56:01 +00:00

integration

[AVR] Optimize 16-bit ORs with '0'

2016-12-30 00:21:56 +00:00

intrinsics

[AVR] Implement stacksave/stackrestore by expanding (PR31342)

2017-02-05 21:35:45 +00:00

pseudo

[AVR] Fix the testsuite after '%' changed to '$' in MIR

2018-02-08 09:17:11 +00:00

relax-mem

[AVR] Fix the testsuite after '%' changed to '$' in MIR

2018-02-08 09:17:11 +00:00

add.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

alloca.ll

[AVR] Fix the test suite

2017-04-19 12:02:52 +00:00

and.ll

[AVR] Optimize 16-bit ANDs with '1'

2016-12-31 01:07:14 +00:00

branch-relaxation-long.ll

[AVR] Insert JMP for long branches

2017-10-04 09:51:28 +00:00

branch-relaxation.ll

[AVR] Fix a typo in the tests

2017-07-16 22:31:07 +00:00

brind.ll

[AVR] Reserve the Y register in all functions

2017-05-03 11:56:01 +00:00

call.ll

[AVR] Fix the build after setting alignment to 1 in r314179

2017-09-26 02:07:54 +00:00

clear-bss.ll

[AVR] Enable the '__do_copy_data' function

2017-09-11 10:32:51 +00:00

cmp.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

com.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

copy-data-to-ram.ll

[AVR] Enable the '__do_copy_data' function

2017-09-11 10:32:51 +00:00

ctlz.ll

[AVR] Use the generic branch relaxer

2017-07-11 04:17:13 +00:00

ctpop.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

cttz.ll

[AVR] Use the generic branch relaxer

2017-07-11 04:17:13 +00:00

directmem.ll

[AVR] Fix the build after setting alignment to 1 in r314179

2017-09-26 02:07:54 +00:00

div.ll

[AVR] Lower i128 divisions to runtime library calls

2018-03-19 00:55:50 +00:00

dynalloca.ll

[AVR] Reserve the Y register in all functions

2017-05-03 11:56:01 +00:00

eor.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

expand-integer-failure.ll

[AVR] Expand 'SELECT_CC' nodes whereever possible

2016-12-07 12:34:47 +00:00

frame.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

frmidx-iterator-bug.ll

[AVR] Fix bug which caused assertion errors for some FRMIDX instructions

2017-07-04 04:40:06 +00:00

high-pressure-on-ptrregs.ll

Un-XFAIL an AVR CodeGen test

2016-11-26 01:07:32 +00:00

icall-func-pointer-correct-addr-space.ll

[AVR] Improve the 'icall-func-pointer-correct-addr-space.ll' test

2017-07-23 23:00:55 +00:00

impossible-reg-to-reg-copy.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

interrupts.ll

[AVR] Use the short form of 'clr <reg>'

2017-11-24 15:36:43 +00:00

io.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

issue-cannot-select-bswap.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

issue-regalloc-stackframe-folding-earlyclobber.ll

[AVR] Remove the earlyclobber flag from LDDWRdYQ

2018-03-06 11:20:25 +00:00

large-return-size.ll

Allow a maximum of 64 bits to be returned in registers

2016-10-08 01:05:09 +00:00

lit.local.cfg

[AVR] Remove some accidentally-commited code that broke the bots

2016-11-17 00:09:38 +00:00

load.ll

[AVR] Elaborate LDWRdPtr into ld r, X++; ld r+1, X

2017-10-04 10:33:36 +00:00

lower-formal-args-struct-return.ll

[AVR] Add a regression test for struct return lowering

2018-03-20 11:23:03 +00:00

lower-formal-arguments-assertion.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

mul.ll

[AVR] Use the short form of 'clr <reg>'

2017-11-24 15:36:43 +00:00

neg.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

no-print-operand-twice.ll

[AVR] Fix a bug where asm operands are printed twice

2017-02-05 10:42:49 +00:00

or.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

PR31344.ll

[AVR] Optimize 16-bit ORs with '0'

2016-12-30 00:21:56 +00:00

PR31345.ll

[AVR] Optimize 16-bit ANDs with '1'

2016-12-31 01:07:14 +00:00

progmem-extended.ll

[AVR] Add tests for a large number of pseudo instructions

2016-12-09 07:49:04 +00:00

progmem.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

rem.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

return.ll

[AVR] Fix two CodeGen tests

2017-12-09 07:51:43 +00:00

rot.ll

[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi

2017-05-31 06:27:46 +00:00

runtime-trig.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

rust-avr-bug-99.ll

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

select-must-add-unconditional-jump.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

sext.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

shift.ll

[AVR] Add a test for 64-bit left shifts

2016-12-16 11:40:00 +00:00

sign-extension.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

smul-with-overflow.ll

[AVR] Expand MULHS for all types

2016-10-08 01:01:49 +00:00

std-ldd-immediate-overflow.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

store-undef.ll

[AVR] Explicitly set the target in all CodeGen tests

2016-12-10 11:23:16 +00:00

store.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

sub.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

trunc.ll

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

umul-with-overflow.ll

[AVR] Expand MULHS for all types

2016-10-08 01:01:49 +00:00

unaligned-atomic-loads.ll

Relax unaligned access assertion when type is byte aligned

2017-12-09 06:45:36 +00:00

varargs.ll

[AVR] Fix the build after setting alignment to 1 in r314179

2017-09-26 02:07:54 +00:00

xor.ll

[AVR] Add the pseudo instruction expansion pass

2016-11-16 21:58:04 +00:00

zext.ll

[AVR] Fix the test suite after r326500.

2018-03-05 20:56:25 +00:00