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[Bug] Fixed incorrect encoding of LDRSH instruction with [base+imm] addressing (AArch64) (fixes #372)

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This commit is contained in:
kobalicek 2022-06-20 09:16:39 +02:00
parent 24863770d6
commit d0cdd70168
2 changed files with 6 additions and 2 deletions
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4
src/asmjit/arm/a64instdb.cpp
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@ -227,7 +227,7 @@ const InstInfo _instInfoTable[] = {
INST(Ldrb , BaseLdSt , (0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb) , kRWI_W , 0 , 1 , 1568), // #157
INST(Ldrh , BaseLdSt , (0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh) , kRWI_W , 0 , 2 , 1573), // #158
INST(Ldrsb , BaseLdSt , (0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, Inst::kIdLdursb) , kRWI_W , 0 , 3 , 1578), // #159
INST(Ldrsh , BaseLdSt , (0b0111100110, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh) , kRWI_W , 0 , 4 , 1584), // #160
INST(Ldrsh , BaseLdSt , (0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh) , kRWI_W , 0 , 4 , 1584), // #160
INST(Ldrsw , BaseLdSt , (0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw) , kRWI_W , 0 , 5 , 1590), // #161
INST(Ldset , BaseAtomicOp , (0b1011100000100000001100, kWX, 30, 0) , kRWI_WRX , 0 , 48 , 1596), // #162
INST(Ldseta , BaseAtomicOp , (0b1011100010100000001100, kWX, 30, 1) , kRWI_WRX , 0 , 49 , 1602), // #163
@ -1133,7 +1133,7 @@ const BaseLdSt baseLdSt[9] = {
{ 0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb }, // ldrb
{ 0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh }, // ldrh
{ 0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, Inst::kIdLdursb }, // ldrsb
{ 0b0111100110, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh }, // ldrsh
{ 0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh }, // ldrsh
{ 0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw }, // ldrsw
{ 0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, Inst::kIdStur }, // str
{ 0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, Inst::kIdSturb }, // strb

4
test/asmjit_test_assembler_a64.cpp
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@ -487,18 +487,22 @@ static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester<a64::Assembler>
TEST_INSTRUCTION("41705F78", ldrh(w1, ptr(x2, -9))); // LDURH
TEST_INSTRUCTION("4168E338", ldrsb(w1, ptr(x2, x3)));
TEST_INSTRUCTION("4104C039", ldrsb(w1, ptr(x2, 1)));
TEST_INSTRUCTION("4120C039", ldrsb(w1, ptr(x2, 8)));
TEST_INSTRUCTION("41D0DF38", ldrsb(w1, ptr(x2, -3))); // LDURSB
TEST_INSTRUCTION("4170DF38", ldrsb(w1, ptr(x2, -9))); // LDURSB
TEST_INSTRUCTION("4168A338", ldrsb(x1, ptr(x2, x3)));
TEST_INSTRUCTION("41048039", ldrsb(x1, ptr(x2, 1)));
TEST_INSTRUCTION("41208039", ldrsb(x1, ptr(x2, 8)));
TEST_INSTRUCTION("41D09F38", ldrsb(x1, ptr(x2, -3))); // LDURSB
TEST_INSTRUCTION("41709F38", ldrsb(x1, ptr(x2, -9))); // LDURSB
TEST_INSTRUCTION("4168E378", ldrsh(w1, ptr(x2, x3)));
TEST_INSTRUCTION("4110C078", ldrsh(w1, ptr(x2, 1))); // LDURSH
TEST_INSTRUCTION("4110C079", ldrsh(w1, ptr(x2, 8)));
TEST_INSTRUCTION("41D0DF78", ldrsh(w1, ptr(x2, -3))); // LDURSH
TEST_INSTRUCTION("4170DF78", ldrsh(w1, ptr(x2, -9))); // LDURSH
TEST_INSTRUCTION("4168A378", ldrsh(x1, ptr(x2, x3)));
TEST_INSTRUCTION("41108078", ldrsh(x1, ptr(x2, 1))); // LDURSH
TEST_INSTRUCTION("41108079", ldrsh(x1, ptr(x2, 8)));
TEST_INSTRUCTION("41D09F78", ldrsh(x1, ptr(x2, -3))); // LDURSH
TEST_INSTRUCTION("41709F78", ldrsh(x1, ptr(x2, -9))); // LDURSH
TEST_INSTRUCTION("410080B9", ldrsw(x1, ptr(x2)));