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ARM: Negative offset support problem

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This patch is to permit a negative offset usage for a non frame access.

Patch by Igor Oblakov.

llvm-svn: 217431
This commit is contained in:
Renato Golin 2014-09-09 09:57:59 +00:00
parent 04bf7c7e7c
commit 024d56e8f8
2 changed files with 19 additions and 2 deletions
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4
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -542,11 +542,11 @@ bool ARMDAGToDAGISel::SelectAddrModeImm12(SDValue N,
}
if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
int RHSC = (int)RHS->getZExtValue();
int RHSC = (int)RHS->getSExtValue();
if (N.getOpcode() == ISD::SUB)
RHSC = -RHSC;
if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits (unsigned)
if (RHSC > -0x1000 && RHSC < 0x1000) { // 12 bits
Base = N.getOperand(0);
if (Base.getOpcode() == ISD::FrameIndex) {
int FI = cast<FrameIndexSDNode>(Base)->getIndex();

17
test/CodeGen/ARM/negative-offset.ll Normal file
View File

@ -0,0 +1,17 @@
; RUN: llc -mtriple=arm-eabi -O3 %s -o - | FileCheck %s
; Function Attrs: nounwind readonly
define arm_aapcscc i32 @sum(i32* nocapture readonly %p) #0 {
entry:
;CHECK-LABEL: sum:
;CHECK-NOT: sub
;CHECK: ldr r{{.*}}, [r0, #-16]
;CHECK: ldr r{{.*}}, [r0, #-8]
%arrayidx = getelementptr inbounds i32* %p, i32 -4
%0 = load i32* %arrayidx, align 4
%arrayidx1 = getelementptr inbounds i32* %p, i32 -2
%1 = load i32* %arrayidx1, align 4
%add = add nsw i32 %1, %0
ret i32 %add
}