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Out GR128 regclass is not a 'real' i128 one.

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llvm-svn: 76044
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:27:53 +00:00
parent 690fef7849
commit 0276bc9176
3 changed files with 4 additions and 5 deletions
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1
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -45,7 +45,6 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) :
addRegisterClass(MVT::i32, SystemZ::GR32RegisterClass); addRegisterClass(MVT::i32, SystemZ::GR32RegisterClass);
addRegisterClass(MVT::i64, SystemZ::GR64RegisterClass); addRegisterClass(MVT::i64, SystemZ::GR64RegisterClass);
addRegisterClass(MVT::v2i32,SystemZ::GR64PRegisterClass); addRegisterClass(MVT::v2i32,SystemZ::GR64PRegisterClass);
addRegisterClass(MVT::i128, SystemZ::GR128RegisterClass);
addRegisterClass(MVT::v2i64,SystemZ::GR128RegisterClass); addRegisterClass(MVT::v2i64,SystemZ::GR128RegisterClass);
if (!UseSoftFloat) { if (!UseSoftFloat) {

6
lib/Target/SystemZ/SystemZInstrInfo.td
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@ -810,18 +810,18 @@ def : Pat<(extloadi64i32 rriaddr:$src), (MOVZX64rm32 rriaddr:$src)>;
// muls // muls
def : Pat<(mulhs GR32:$src1, GR32:$src2), def : Pat<(mulhs GR32:$src1, GR32:$src2),
(EXTRACT_SUBREG (MUL64rrP (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (EXTRACT_SUBREG (MUL64rrP (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)),
GR32:$src1, subreg_odd32), GR32:$src1, subreg_odd32),
GR32:$src2), GR32:$src2),
subreg_even32)>; subreg_even32)>;
def : Pat<(mulhu GR32:$src1, GR32:$src2), def : Pat<(mulhu GR32:$src1, GR32:$src2),
(EXTRACT_SUBREG (UMUL64rrP (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (EXTRACT_SUBREG (UMUL64rrP (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)),
GR32:$src1, subreg_odd32), GR32:$src1, subreg_odd32),
GR32:$src2), GR32:$src2),
subreg_even32)>; subreg_even32)>;
def : Pat<(mulhu GR64:$src1, GR64:$src2), def : Pat<(mulhu GR64:$src1, GR64:$src2),
(EXTRACT_SUBREG (UMUL128rrP (INSERT_SUBREG (i128 (IMPLICIT_DEF)), (EXTRACT_SUBREG (UMUL128rrP (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
GR64:$src1, subreg_odd), GR64:$src1, subreg_odd),
GR64:$src2), GR64:$src2),
subreg_even)>; subreg_even)>;

2
lib/Target/SystemZ/SystemZRegisterInfo.td
View File

@ -399,7 +399,7 @@ def GR64P : RegisterClass<"SystemZ", [v2i32], 64,
}]; }];
} }
def GR128 : RegisterClass<"SystemZ", [i128, v2i64], 128, def GR128 : RegisterClass<"SystemZ", [v2i64], 128,
[R0Q, R2Q, R4Q, R6Q, R8Q, R10Q, R12Q, R14Q]> [R0Q, R2Q, R4Q, R6Q, R8Q, R10Q, R12Q, R14Q]>
{ {
let SubRegClassList = [GR32, GR32, GR64, GR64]; let SubRegClassList = [GR32, GR32, GR64, GR64];