From 02eb8d4d831327f20284d03aa802d73c28ad1e2d Mon Sep 17 00:00:00 2001 From: Simon Dardis Date: Thu, 26 Oct 2017 11:36:54 +0000 Subject: [PATCH] [mips] Fix (dis)assembly of abs.fmt for micromips These instructions were previously marked as codegen only preventing them from being assembled as microMIPS or disassembled. Reviewers: atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D39123 llvm-svn: 316656 --- lib/Target/Mips/MicroMipsInstrFPU.td | 14 ++++++++++---- lib/Target/Mips/MipsInstrFPU.td | 9 ++++++--- .../Disassembler/Mips/micromips32r3/valid-el.txt | 2 ++ test/MC/Disassembler/Mips/micromips32r3/valid.txt | 2 ++ test/MC/Mips/micromips/valid.s | 4 ++++ 5 files changed, 24 insertions(+), 7 deletions(-) diff --git a/lib/Target/Mips/MicroMipsInstrFPU.td b/lib/Target/Mips/MicroMipsInstrFPU.td index ee40a79ccfd..49025cc1570 100644 --- a/lib/Target/Mips/MicroMipsInstrFPU.td +++ b/lib/Target/Mips/MicroMipsInstrFPU.td @@ -95,8 +95,16 @@ def CVT_L_S_MM : MMRel, ABSS_FT<"cvt.l.s", FGR64Opnd, FGR32Opnd, II_CVT>, def CVT_L_D64_MM : MMRel, ABSS_FT<"cvt.l.d", FGR64Opnd, FGR64Opnd, II_CVT>, ROUND_W_FM_MM<1, 0x4>, ISA_MICROMIPS, FGR_64; -def FABS_S_MM : MMRel, ABSS_FT<"abs.s", FGR32Opnd, FGR32Opnd, II_ABS, fabs>, - ABS_FM_MM<0, 0xd>, ISA_MICROMIPS; +} + +let DecoderNamespace = "MicroMips" in { + def FABS_S_MM : MMRel, ABSS_FT<"abs.s", FGR32Opnd, FGR32Opnd, II_ABS, fabs>, + ABS_FM_MM<0, 0xd>, ISA_MICROMIPS; + def FABS_MM : MMRel, ABSS_FT<"abs.d", AFGR64Opnd, AFGR64Opnd, II_ABS, fabs>, + ABS_FM_MM<1, 0xd>, ISA_MICROMIPS, FGR_32; +} + +let isCodeGenOnly = 1 in { def FMOV_S_MM : MMRel, ABSS_FT<"mov.s", FGR32Opnd, FGR32Opnd, II_MOV_S>, ABS_FM_MM<0, 0x1>, ISA_MICROMIPS; def FNEG_S_MM : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, II_NEG, fneg>, @@ -110,8 +118,6 @@ def CVT_S_D32_MM : MMRel, ABSS_FT<"cvt.s.d", FGR32Opnd, AFGR64Opnd, II_CVT>, def CVT_S_W_MM : MMRel, ABSS_FT<"cvt.s.w", FGR32Opnd, FGR32Opnd, II_CVT>, ABS_FM_MM<1, 0x6d>, ISA_MICROMIPS; -def FABS_MM : MMRel, ABSS_FT<"abs.d", AFGR64Opnd, AFGR64Opnd, II_ABS, fabs>, - ABS_FM_MM<1, 0xd>, ISA_MICROMIPS, FGR_32; def FNEG_MM : MMRel, ABSS_FT<"neg.d", AFGR64Opnd, AFGR64Opnd, II_NEG, fneg>, ABS_FM_MM<1, 0x2d>, ISA_MICROMIPS, FGR_32; diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 89b9e5e7a81..c8173911537 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -448,11 +448,14 @@ let isPseudo = 1, isCodeGenOnly = 1 in { def PseudoCVT_D64_L : ABSS_FT<"", FGR64Opnd, GPR64Opnd, II_CVT>; } -def FABS_S : MMRel, ABSS_FT<"abs.s", FGR32Opnd, FGR32Opnd, II_ABS, fabs>, - ABSS_FM<0x5, 16>; +let AdditionalPredicates = [NotInMicroMips] in { + def FABS_S : MMRel, ABSS_FT<"abs.s", FGR32Opnd, FGR32Opnd, II_ABS, fabs>, + ABSS_FM<0x5, 16>; + defm FABS : ABSS_M<"abs.d", II_ABS, fabs>, ABSS_FM<0x5, 17>; +} + def FNEG_S : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, II_NEG, fneg>, ABSS_FM<0x7, 16>; -defm FABS : ABSS_M<"abs.d", II_ABS, fabs>, ABSS_FM<0x5, 17>; defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>; def FSQRT_S : MMRel, StdMMR6Rel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, diff --git a/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt b/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt index 3a1799dc598..dc76f48a95a 100644 --- a/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt +++ b/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt @@ -49,6 +49,8 @@ 0x88 0x46 # CHECK: break16 8 0xce 0x46 # CHECK: sdbbp16 14 0x34 0x84 # CHECK: movep $5, $6, $2, $3 +0x40 0x54 0x7b 0x03 # CHECK: abs.s $f2, $f0 +0x40 0x54 0x7b 0x23 # CHECK: abs.d $f2, $f0 0xe6 0x00 0x10 0x49 # CHECK: add $9, $6, $7 0x26 0x11 0x67 0x45 # CHECK: addi $9, $6, 17767 0x26 0x31 0x67 0xc5 # CHECK: addiu $9, $6, -15001 diff --git a/test/MC/Disassembler/Mips/micromips32r3/valid.txt b/test/MC/Disassembler/Mips/micromips32r3/valid.txt index 675ef9e4e8b..38d6897e1c4 100644 --- a/test/MC/Disassembler/Mips/micromips32r3/valid.txt +++ b/test/MC/Disassembler/Mips/micromips32r3/valid.txt @@ -49,6 +49,8 @@ 0x46 0x88 # CHECK: break16 8 0x46 0xce # CHECK: sdbbp16 14 0x84 0x34 # CHECK: movep $5, $6, $2, $3 +0x54 0x40 0x03 0x7b # CHECK: abs.s $f2, $f0 +0x54 0x40 0x23 0x7b # CHECK: abs.d $f2, $f0 0x00 0xe6 0x49 0x10 # CHECK: add $9, $6, $7 0x11 0x26 0x45 0x67 # CHECK: addi $9, $6, 17767 0x31 0x26 0xc5 0x67 # CHECK: addiu $9, $6, -15001 diff --git a/test/MC/Mips/micromips/valid.s b/test/MC/Mips/micromips/valid.s index 94132dafe06..47266c9da10 100644 --- a/test/MC/Mips/micromips/valid.s +++ b/test/MC/Mips/micromips/valid.s @@ -49,6 +49,10 @@ sdbbp16 14 # CHECK: sdbbp16 14 # encoding: [0x46,0xce] lw $3, 32($sp) # CHECK: lw $3, 32($sp) # encoding: [0x48,0x68] sw $4, 124($sp) # CHECK: sw $4, 124($sp) # encoding: [0xc8,0x9f] lw $3, 32($gp) # CHECK: lw $3, 32($gp) # encoding: [0x65,0x88] +abs.s $f0, $f2 # CHECK: abs.s $f0, $f2 # encoding: [0x54,0x02,0x03,0x7b] + # CHECK-NEXT: #