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AMDGPU: Split R600 AsmPrinter code into its own class
Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D47245 llvm-svn: 333219
This commit is contained in:
Tom Stellard
parent
381e806df7
commit
094abf2283
@ -23,6 +23,7 @@
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#include "InstPrinter/AMDGPUInstPrinter.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "MCTargetDesc/AMDGPUTargetStreamer.h"
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#include "R600AsmPrinter.h"
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#include "R600Defines.h"
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#include "R600MachineFunctionInfo.h"
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#include "R600RegisterInfo.h"
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@ -89,7 +90,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
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extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
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TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
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createAMDGPUAsmPrinterPass);
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llvm::createR600AsmPrinterPass);
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TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),
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createAMDGPUAsmPrinterPass);
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}
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@ -115,9 +116,6 @@ AMDGPUTargetStreamer* AMDGPUAsmPrinter::getTargetStreamer() const {
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}
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void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
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if (TM.getTargetTriple().getArch() != Triple::amdgcn)
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return;
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if (TM.getTargetTriple().getOS() != Triple::AMDHSA &&
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TM.getTargetTriple().getOS() != Triple::AMDPAL)
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return;
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@ -143,8 +141,6 @@ void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
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}
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void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
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if (TM.getTargetTriple().getArch() != Triple::amdgcn)
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return;
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// Following code requires TargetStreamer to be present.
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if (!getTargetStreamer())
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@ -309,24 +305,20 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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OutStreamer->SwitchSection(ConfigSection);
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}
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if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
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if (MFI->isEntryFunction()) {
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getSIProgramInfo(CurrentProgramInfo, MF);
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} else {
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auto I = CallGraphResourceInfo.insert(
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std::make_pair(&MF.getFunction(), SIFunctionResourceInfo()));
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SIFunctionResourceInfo &Info = I.first->second;
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assert(I.second && "should only be called once per function");
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Info = analyzeResourceUsage(MF);
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}
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if (STM.isAmdPalOS())
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EmitPALMetadata(MF, CurrentProgramInfo);
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else if (!STM.isAmdHsaOS()) {
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EmitProgramInfoSI(MF, CurrentProgramInfo);
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}
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if (MFI->isEntryFunction()) {
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getSIProgramInfo(CurrentProgramInfo, MF);
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} else {
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EmitProgramInfoR600(MF);
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auto I = CallGraphResourceInfo.insert(
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std::make_pair(&MF.getFunction(), SIFunctionResourceInfo()));
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SIFunctionResourceInfo &Info = I.first->second;
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assert(I.second && "should only be called once per function");
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Info = analyzeResourceUsage(MF);
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}
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if (STM.isAmdPalOS())
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EmitPALMetadata(MF, CurrentProgramInfo);
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else if (!STM.isAmdHsaOS()) {
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EmitProgramInfoSI(MF, CurrentProgramInfo);
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}
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DisasmLines.clear();
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@ -340,84 +332,78 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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Context.getELFSection(".AMDGPU.csdata", ELF::SHT_PROGBITS, 0);
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OutStreamer->SwitchSection(CommentSection);
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if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
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if (!MFI->isEntryFunction()) {
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OutStreamer->emitRawComment(" Function info:", false);
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SIFunctionResourceInfo &Info = CallGraphResourceInfo[&MF.getFunction()];
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emitCommonFunctionComments(
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Info.NumVGPR,
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Info.getTotalNumSGPRs(MF.getSubtarget<SISubtarget>()),
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Info.PrivateSegmentSize,
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getFunctionCodeSize(MF));
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return false;
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}
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OutStreamer->emitRawComment(" Kernel info:", false);
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emitCommonFunctionComments(CurrentProgramInfo.NumVGPR,
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CurrentProgramInfo.NumSGPR,
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CurrentProgramInfo.ScratchSize,
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getFunctionCodeSize(MF));
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OutStreamer->emitRawComment(
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" FloatMode: " + Twine(CurrentProgramInfo.FloatMode), false);
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OutStreamer->emitRawComment(
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" IeeeMode: " + Twine(CurrentProgramInfo.IEEEMode), false);
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OutStreamer->emitRawComment(
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" LDSByteSize: " + Twine(CurrentProgramInfo.LDSSize) +
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" bytes/workgroup (compile time only)", false);
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OutStreamer->emitRawComment(
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" SGPRBlocks: " + Twine(CurrentProgramInfo.SGPRBlocks), false);
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OutStreamer->emitRawComment(
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" VGPRBlocks: " + Twine(CurrentProgramInfo.VGPRBlocks), false);
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OutStreamer->emitRawComment(
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" NumSGPRsForWavesPerEU: " +
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Twine(CurrentProgramInfo.NumSGPRsForWavesPerEU), false);
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OutStreamer->emitRawComment(
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" NumVGPRsForWavesPerEU: " +
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Twine(CurrentProgramInfo.NumVGPRsForWavesPerEU), false);
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OutStreamer->emitRawComment(
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" ReservedVGPRFirst: " + Twine(CurrentProgramInfo.ReservedVGPRFirst),
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false);
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OutStreamer->emitRawComment(
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" ReservedVGPRCount: " + Twine(CurrentProgramInfo.ReservedVGPRCount),
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false);
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if (MF.getSubtarget<SISubtarget>().debuggerEmitPrologue()) {
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OutStreamer->emitRawComment(
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" DebuggerWavefrontPrivateSegmentOffsetSGPR: s" +
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Twine(CurrentProgramInfo.DebuggerWavefrontPrivateSegmentOffsetSGPR), false);
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OutStreamer->emitRawComment(
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" DebuggerPrivateSegmentBufferSGPR: s" +
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Twine(CurrentProgramInfo.DebuggerPrivateSegmentBufferSGPR), false);
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}
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:USER_SGPR: " +
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Twine(G_00B84C_USER_SGPR(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TRAP_HANDLER: " +
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Twine(G_00B84C_TRAP_HANDLER(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_X_EN: " +
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Twine(G_00B84C_TGID_X_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_Y_EN: " +
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Twine(G_00B84C_TGID_Y_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_Z_EN: " +
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Twine(G_00B84C_TGID_Z_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: " +
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Twine(G_00B84C_TIDIG_COMP_CNT(CurrentProgramInfo.ComputePGMRSrc2)),
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false);
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} else {
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R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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OutStreamer->emitRawComment(
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Twine("SQ_PGM_RESOURCES:STACK_SIZE = " + Twine(MFI->CFStackSize)));
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if (!MFI->isEntryFunction()) {
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OutStreamer->emitRawComment(" Function info:", false);
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SIFunctionResourceInfo &Info = CallGraphResourceInfo[&MF.getFunction()];
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emitCommonFunctionComments(
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Info.NumVGPR,
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Info.getTotalNumSGPRs(MF.getSubtarget<SISubtarget>()),
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Info.PrivateSegmentSize,
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getFunctionCodeSize(MF));
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return false;
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}
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OutStreamer->emitRawComment(" Kernel info:", false);
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emitCommonFunctionComments(CurrentProgramInfo.NumVGPR,
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CurrentProgramInfo.NumSGPR,
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CurrentProgramInfo.ScratchSize,
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getFunctionCodeSize(MF));
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OutStreamer->emitRawComment(
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" FloatMode: " + Twine(CurrentProgramInfo.FloatMode), false);
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OutStreamer->emitRawComment(
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" IeeeMode: " + Twine(CurrentProgramInfo.IEEEMode), false);
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OutStreamer->emitRawComment(
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" LDSByteSize: " + Twine(CurrentProgramInfo.LDSSize) +
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" bytes/workgroup (compile time only)", false);
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OutStreamer->emitRawComment(
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" SGPRBlocks: " + Twine(CurrentProgramInfo.SGPRBlocks), false);
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OutStreamer->emitRawComment(
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" VGPRBlocks: " + Twine(CurrentProgramInfo.VGPRBlocks), false);
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OutStreamer->emitRawComment(
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" NumSGPRsForWavesPerEU: " +
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Twine(CurrentProgramInfo.NumSGPRsForWavesPerEU), false);
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OutStreamer->emitRawComment(
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" NumVGPRsForWavesPerEU: " +
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Twine(CurrentProgramInfo.NumVGPRsForWavesPerEU), false);
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OutStreamer->emitRawComment(
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" ReservedVGPRFirst: " + Twine(CurrentProgramInfo.ReservedVGPRFirst),
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false);
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OutStreamer->emitRawComment(
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" ReservedVGPRCount: " + Twine(CurrentProgramInfo.ReservedVGPRCount),
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false);
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if (MF.getSubtarget<SISubtarget>().debuggerEmitPrologue()) {
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OutStreamer->emitRawComment(
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" DebuggerWavefrontPrivateSegmentOffsetSGPR: s" +
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Twine(CurrentProgramInfo.DebuggerWavefrontPrivateSegmentOffsetSGPR), false);
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OutStreamer->emitRawComment(
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" DebuggerPrivateSegmentBufferSGPR: s" +
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Twine(CurrentProgramInfo.DebuggerPrivateSegmentBufferSGPR), false);
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}
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:USER_SGPR: " +
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Twine(G_00B84C_USER_SGPR(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TRAP_HANDLER: " +
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Twine(G_00B84C_TRAP_HANDLER(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_X_EN: " +
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Twine(G_00B84C_TGID_X_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_Y_EN: " +
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Twine(G_00B84C_TGID_Y_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TGID_Z_EN: " +
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Twine(G_00B84C_TGID_Z_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
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OutStreamer->emitRawComment(
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" COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: " +
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Twine(G_00B84C_TIDIG_COMP_CNT(CurrentProgramInfo.ComputePGMRSrc2)),
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false);
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}
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if (STM.dumpCode()) {
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@ -440,65 +426,6 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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return false;
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}
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void AMDGPUAsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
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unsigned MaxGPR = 0;
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bool killPixel = false;
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const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>();
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const R600RegisterInfo *RI = STM.getRegisterInfo();
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const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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for (const MachineBasicBlock &MBB : MF) {
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for (const MachineInstr &MI : MBB) {
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if (MI.getOpcode() == AMDGPU::KILLGT)
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killPixel = true;
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unsigned numOperands = MI.getNumOperands();
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for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
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const MachineOperand &MO = MI.getOperand(op_idx);
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if (!MO.isReg())
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continue;
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unsigned HWReg = RI->getHWRegIndex(MO.getReg());
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// Register with value > 127 aren't GPR
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if (HWReg > 127)
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continue;
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MaxGPR = std::max(MaxGPR, HWReg);
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}
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}
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}
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unsigned RsrcReg;
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if (STM.getGeneration() >= R600Subtarget::EVERGREEN) {
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// Evergreen / Northern Islands
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switch (MF.getFunction().getCallingConv()) {
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default: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_CS: RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS; break;
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case CallingConv::AMDGPU_GS: RsrcReg = R_028878_SQ_PGM_RESOURCES_GS; break;
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case CallingConv::AMDGPU_PS: RsrcReg = R_028844_SQ_PGM_RESOURCES_PS; break;
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case CallingConv::AMDGPU_VS: RsrcReg = R_028860_SQ_PGM_RESOURCES_VS; break;
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}
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} else {
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// R600 / R700
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switch (MF.getFunction().getCallingConv()) {
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default: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_GS: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_CS: LLVM_FALLTHROUGH;
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case CallingConv::AMDGPU_VS: RsrcReg = R_028868_SQ_PGM_RESOURCES_VS; break;
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case CallingConv::AMDGPU_PS: RsrcReg = R_028850_SQ_PGM_RESOURCES_PS; break;
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}
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}
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OutStreamer->EmitIntValue(RsrcReg, 4);
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OutStreamer->EmitIntValue(S_NUM_GPRS(MaxGPR + 1) |
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S_STACK_SIZE(MFI->CFStackSize), 4);
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OutStreamer->EmitIntValue(R_02880C_DB_SHADER_CONTROL, 4);
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OutStreamer->EmitIntValue(S_02880C_KILL_ENABLE(killPixel), 4);
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if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) {
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OutStreamer->EmitIntValue(R_0288E8_SQ_LDS_ALLOC, 4);
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OutStreamer->EmitIntValue(alignTo(MFI->getLDSSize(), 4) >> 2, 4);
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}
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}
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uint64_t AMDGPUAsmPrinter::getFunctionCodeSize(const MachineFunction &MF) const {
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const SISubtarget &STM = MF.getSubtarget<SISubtarget>();
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const SIInstrInfo *TII = STM.getInstrInfo();
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@ -137,7 +137,6 @@ private:
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/// Emit register usage information so that the GPU driver
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/// can correctly setup the GPU state.
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void EmitProgramInfoR600(const MachineFunction &MF);
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void EmitProgramInfoSI(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo);
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void EmitPALMetadata(const MachineFunction &MF,
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@ -19,6 +19,7 @@
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#include "AMDGPUTargetMachine.h"
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#include "InstPrinter/AMDGPUInstPrinter.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "R600AsmPrinter.h"
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#include "SIInstrInfo.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineInstr.h"
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@ -175,11 +176,13 @@ bool AMDGPUAsmPrinter::lowerOperand(const MachineOperand &MO,
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return MCInstLowering.lowerOperand(MO, MCOp);
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}
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const MCExpr *AMDGPUAsmPrinter::lowerConstant(const Constant *CV) {
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static const MCExpr *lowerAddrSpaceCast(const TargetMachine &TM,
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const Constant *CV,
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MCContext &OutContext) {
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// TargetMachine does not support llvm-style cast. Use C++-style cast.
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// This is safe since TM is always of type AMDGPUTargetMachine or its
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// derived class.
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auto *AT = static_cast<AMDGPUTargetMachine*>(&TM);
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auto &AT = static_cast<const AMDGPUTargetMachine&>(TM);
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auto *CE = dyn_cast<ConstantExpr>(CV);
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// Lower null pointers in private and local address space.
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@ -188,12 +191,18 @@ const MCExpr *AMDGPUAsmPrinter::lowerConstant(const Constant *CV) {
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if (CE && CE->getOpcode() == Instruction::AddrSpaceCast) {
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auto Op = CE->getOperand(0);
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auto SrcAddr = Op->getType()->getPointerAddressSpace();
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if (Op->isNullValue() && AT->getNullPointerValue(SrcAddr) == 0) {
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if (Op->isNullValue() && AT.getNullPointerValue(SrcAddr) == 0) {
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auto DstAddr = CE->getType()->getPointerAddressSpace();
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return MCConstantExpr::create(AT->getNullPointerValue(DstAddr),
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return MCConstantExpr::create(AT.getNullPointerValue(DstAddr),
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OutContext);
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}
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}
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return nullptr;
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}
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const MCExpr *AMDGPUAsmPrinter::lowerConstant(const Constant *CV) {
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if (const MCExpr *E = lowerAddrSpaceCast(TM, CV, OutContext))
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return E;
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return AsmPrinter::lowerConstant(CV);
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}
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@ -293,3 +302,34 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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}
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}
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void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>();
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AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
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StringRef Err;
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if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) {
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LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
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C.emitError("Illegal instruction detected: " + Err);
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MI->print(errs());
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}
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if (MI->isBundle()) {
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const MachineBasicBlock *MBB = MI->getParent();
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MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
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while (I != MBB->instr_end() && I->isInsideBundle()) {
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EmitInstruction(&*I);
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++I;
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}
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} else {
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MCInst TmpInst;
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MCInstLowering.lower(MI, TmpInst);
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EmitToStreamer(*OutStreamer, TmpInst);
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}
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}
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const MCExpr *R600AsmPrinter::lowerConstant(const Constant *CV) {
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if (const MCExpr *E = lowerAddrSpaceCast(TM, CV, OutContext))
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return E;
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return AsmPrinter::lowerConstant(CV);
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}
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@ -64,6 +64,7 @@ add_llvm_target(AMDGPUCodeGen
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GCNMinRegStrategy.cpp
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GCNRegPressure.cpp
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GCNSchedStrategy.cpp
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R600AsmPrinter.cpp
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R600ClauseMergePass.cpp
|
||||
R600ControlFlowFinalizer.cpp
|
||||
R600EmitClauseMarkers.cpp
|
||||
|
||||
129
lib/Target/AMDGPU/R600AsmPrinter.cpp
Normal file
129
lib/Target/AMDGPU/R600AsmPrinter.cpp
Normal file
@ -0,0 +1,129 @@
|
||||
//===-- R600AsmPrinter.cpp - R600 Assebly printer ------------------------===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
/// \file
|
||||
///
|
||||
/// The R600AsmPrinter is used to print both assembly string and also binary
|
||||
/// code. When passed an MCAsmStreamer it prints assembly and when passed
|
||||
/// an MCObjectStreamer it outputs binary code.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "R600AsmPrinter.h"
|
||||
#include "AMDGPUSubtarget.h"
|
||||
#include "R600Defines.h"
|
||||
#include "R600MachineFunctionInfo.h"
|
||||
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
|
||||
#include "llvm/BinaryFormat/ELF.h"
|
||||
#include "llvm/MC/MCContext.h"
|
||||
#include "llvm/MC/MCSectionELF.h"
|
||||
#include "llvm/MC/MCStreamer.h"
|
||||
#include "llvm/Target/TargetLoweringObjectFile.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
AsmPrinter *
|
||||
llvm::createR600AsmPrinterPass(TargetMachine &TM,
|
||||
std::unique_ptr<MCStreamer> &&Streamer) {
|
||||
return new R600AsmPrinter(TM, std::move(Streamer));
|
||||
}
|
||||
|
||||
R600AsmPrinter::R600AsmPrinter(TargetMachine &TM,
|
||||
std::unique_ptr<MCStreamer> Streamer)
|
||||
: AsmPrinter(TM, std::move(Streamer)) { }
|
||||
|
||||
StringRef R600AsmPrinter::getPassName() const {
|
||||
return "R600 Assembly Printer";
|
||||
}
|
||||
|
||||
void R600AsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
|
||||
unsigned MaxGPR = 0;
|
||||
bool killPixel = false;
|
||||
const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>();
|
||||
const R600RegisterInfo *RI = STM.getRegisterInfo();
|
||||
const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
|
||||
|
||||
for (const MachineBasicBlock &MBB : MF) {
|
||||
for (const MachineInstr &MI : MBB) {
|
||||
if (MI.getOpcode() == AMDGPU::KILLGT)
|
||||
killPixel = true;
|
||||
unsigned numOperands = MI.getNumOperands();
|
||||
for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
|
||||
const MachineOperand &MO = MI.getOperand(op_idx);
|
||||
if (!MO.isReg())
|
||||
continue;
|
||||
unsigned HWReg = RI->getHWRegIndex(MO.getReg());
|
||||
|
||||
// Register with value > 127 aren't GPR
|
||||
if (HWReg > 127)
|
||||
continue;
|
||||
MaxGPR = std::max(MaxGPR, HWReg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
unsigned RsrcReg;
|
||||
if (STM.getGeneration() >= R600Subtarget::EVERGREEN) {
|
||||
// Evergreen / Northern Islands
|
||||
switch (MF.getFunction().getCallingConv()) {
|
||||
default: LLVM_FALLTHROUGH;
|
||||
case CallingConv::AMDGPU_CS: RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS; break;
|
||||
case CallingConv::AMDGPU_GS: RsrcReg = R_028878_SQ_PGM_RESOURCES_GS; break;
|
||||
case CallingConv::AMDGPU_PS: RsrcReg = R_028844_SQ_PGM_RESOURCES_PS; break;
|
||||
case CallingConv::AMDGPU_VS: RsrcReg = R_028860_SQ_PGM_RESOURCES_VS; break;
|
||||
}
|
||||
} else {
|
||||
// R600 / R700
|
||||
switch (MF.getFunction().getCallingConv()) {
|
||||
default: LLVM_FALLTHROUGH;
|
||||
case CallingConv::AMDGPU_GS: LLVM_FALLTHROUGH;
|
||||
case CallingConv::AMDGPU_CS: LLVM_FALLTHROUGH;
|
||||
case CallingConv::AMDGPU_VS: RsrcReg = R_028868_SQ_PGM_RESOURCES_VS; break;
|
||||
case CallingConv::AMDGPU_PS: RsrcReg = R_028850_SQ_PGM_RESOURCES_PS; break;
|
||||
}
|
||||
}
|
||||
|
||||
OutStreamer->EmitIntValue(RsrcReg, 4);
|
||||
OutStreamer->EmitIntValue(S_NUM_GPRS(MaxGPR + 1) |
|
||||
S_STACK_SIZE(MFI->CFStackSize), 4);
|
||||
OutStreamer->EmitIntValue(R_02880C_DB_SHADER_CONTROL, 4);
|
||||
OutStreamer->EmitIntValue(S_02880C_KILL_ENABLE(killPixel), 4);
|
||||
|
||||
if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) {
|
||||
OutStreamer->EmitIntValue(R_0288E8_SQ_LDS_ALLOC, 4);
|
||||
OutStreamer->EmitIntValue(alignTo(MFI->getLDSSize(), 4) >> 2, 4);
|
||||
}
|
||||
}
|
||||
|
||||
bool R600AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
|
||||
SetupMachineFunction(MF);
|
||||
|
||||
MCContext &Context = getObjFileLowering().getContext();
|
||||
MCSectionELF *ConfigSection =
|
||||
Context.getELFSection(".AMDGPU.config", ELF::SHT_PROGBITS, 0);
|
||||
OutStreamer->SwitchSection(ConfigSection);
|
||||
|
||||
EmitProgramInfoR600(MF);
|
||||
|
||||
EmitFunctionBody();
|
||||
|
||||
if (isVerbose()) {
|
||||
MCSectionELF *CommentSection =
|
||||
Context.getELFSection(".AMDGPU.csdata", ELF::SHT_PROGBITS, 0);
|
||||
OutStreamer->SwitchSection(CommentSection);
|
||||
|
||||
R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
|
||||
OutStreamer->emitRawComment(
|
||||
Twine("SQ_PGM_RESOURCES:STACK_SIZE = " + Twine(MFI->CFStackSize)));
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
46
lib/Target/AMDGPU/R600AsmPrinter.h
Normal file
46
lib/Target/AMDGPU/R600AsmPrinter.h
Normal file
@ -0,0 +1,46 @@
|
||||
//===-- R600AsmPrinter.h - Print R600 assembly code -------------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
/// \file
|
||||
/// R600 Assembly printer class.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef LLVM_LIB_TARGET_AMDGPU_R600ASMPRINTER_H
|
||||
#define LLVM_LIB_TARGET_AMDGPU_R600ASMPRINTER_H
|
||||
|
||||
#include "llvm/CodeGen/AsmPrinter.h"
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class R600AsmPrinter final : public AsmPrinter {
|
||||
|
||||
public:
|
||||
explicit R600AsmPrinter(TargetMachine &TM,
|
||||
std::unique_ptr<MCStreamer> Streamer);
|
||||
StringRef getPassName() const override;
|
||||
bool runOnMachineFunction(MachineFunction &MF) override;
|
||||
/// Implemented in AMDGPUMCInstLower.cpp
|
||||
void EmitInstruction(const MachineInstr *MI) override;
|
||||
/// Lower the specified LLVM Constant to an MCExpr.
|
||||
/// The AsmPrinter::lowerConstantof does not know how to lower
|
||||
/// addrspacecast, therefore they should be lowered by this function.
|
||||
const MCExpr *lowerConstant(const Constant *CV) override;
|
||||
|
||||
private:
|
||||
void EmitProgramInfoR600(const MachineFunction &MF);
|
||||
};
|
||||
|
||||
AsmPrinter *
|
||||
createR600AsmPrinterPass(TargetMachine &TM,
|
||||
std::unique_ptr<MCStreamer> &&Streamer);
|
||||
|
||||
} // namespace llvm
|
||||
|
||||
#endif // LLVM_LIB_TARGET_AMDGPU_R600ASMPRINTER_H
|
||||
Loading…
Reference in New Issue
Block a user