From 12654d6d7166f2a76935ff76123e6772de637545 Mon Sep 17 00:00:00 2001 From: David Blaikie Date: Thu, 26 Oct 2017 23:39:54 +0000 Subject: [PATCH] InstructionSelectorImpl.h: Modularize/remove ODR violations by using a static member function to expose the debug name llvm-svn: 316715 --- .../GlobalISel/InstructionSelectorImpl.h | 237 +++++++++++------- include/llvm/module.modulemap | 1 - .../AArch64/AArch64InstructionSelector.cpp | 4 +- lib/Target/ARM/ARMInstructionSelector.cpp | 4 +- lib/Target/X86/X86InstructionSelector.cpp | 5 +- 5 files changed, 151 insertions(+), 100 deletions(-) diff --git a/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h b/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h index 29cc9036401..c9cc06c7927 100644 --- a/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h +++ b/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h @@ -55,13 +55,15 @@ bool InstructionSelector::executeMatchTable( enum RejectAction { RejectAndGiveUp, RejectAndResume }; auto handleReject = [&]() -> RejectAction { - DEBUG(dbgs() << CurrentIdx << ": Rejected\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": Rejected\n"); if (OnFailResumeAt.empty()) return RejectAndGiveUp; CurrentIdx = OnFailResumeAt.back(); OnFailResumeAt.pop_back(); - DEBUG(dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " (" - << OnFailResumeAt.size() << " try-blocks remain)\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " (" + << OnFailResumeAt.size() << " try-blocks remain)\n"); return RejectAndResume; }; @@ -69,7 +71,8 @@ bool InstructionSelector::executeMatchTable( assert(CurrentIdx != ~0u && "Invalid MatchTable index"); switch (MatchTable[CurrentIdx++]) { case GIM_Try: { - DEBUG(dbgs() << CurrentIdx << ": Begin try-block\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": Begin try-block\n"); OnFailResumeAt.push_back(MatchTable[CurrentIdx++]); break; } @@ -85,13 +88,15 @@ bool InstructionSelector::executeMatchTable( MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); if (!MO.isReg()) { - DEBUG(dbgs() << CurrentIdx << ": Not a register\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": Not a register\n"); if (handleReject() == RejectAndGiveUp) return false; break; } if (TRI.isPhysicalRegister(MO.getReg())) { - DEBUG(dbgs() << CurrentIdx << ": Is a physical register\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": Is a physical register\n"); if (handleReject() == RejectAndGiveUp) return false; break; @@ -105,16 +110,19 @@ bool InstructionSelector::executeMatchTable( "Expected to store MIs in order"); State.MIs.push_back(NewMI); } - DEBUG(dbgs() << CurrentIdx << ": MIs[" << NewInsnID - << "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": MIs[" << NewInsnID + << "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx + << ")\n"); break; } case GIM_CheckFeatures: { int64_t ExpectedBitsetID = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckFeatures(ExpectedBitsetID=" - << ExpectedBitsetID << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx + << ": GIM_CheckFeatures(ExpectedBitsetID=" + << ExpectedBitsetID << ")\n"); if ((AvailableFeatures & MatcherInfo.FeatureBitsets[ExpectedBitsetID]) != MatcherInfo.FeatureBitsets[ExpectedBitsetID]) { if (handleReject() == RejectAndGiveUp) @@ -128,9 +136,10 @@ bool InstructionSelector::executeMatchTable( int64_t Expected = MatchTable[CurrentIdx++]; unsigned Opcode = State.MIs[InsnID]->getOpcode(); - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID - << "], ExpectedOpcode=" << Expected << ") // Got=" << Opcode - << "\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID + << "], ExpectedOpcode=" << Expected + << ") // Got=" << Opcode << "\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (Opcode != Expected) { if (handleReject() == RejectAndGiveUp) @@ -142,8 +151,9 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckNumOperands: { int64_t InsnID = MatchTable[CurrentIdx++]; int64_t Expected = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs[" << InsnID - << "], Expected=" << Expected << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs[" + << InsnID << "], Expected=" << Expected << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (State.MIs[InsnID]->getNumOperands() != Expected) { if (handleReject() == RejectAndGiveUp) @@ -154,8 +164,10 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckI64ImmPredicate: { int64_t InsnID = MatchTable[CurrentIdx++]; int64_t Predicate = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckI64ImmPredicate(MIs[" << InsnID - << "], Predicate=" << Predicate << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() + << CurrentIdx << ": GIM_CheckI64ImmPredicate(MIs[" + << InsnID << "], Predicate=" << Predicate << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT"); @@ -176,8 +188,10 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckAPIntImmPredicate: { int64_t InsnID = MatchTable[CurrentIdx++]; int64_t Predicate = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs[" - << InsnID << "], Predicate=" << Predicate << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() + << CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs[" + << InsnID << "], Predicate=" << Predicate << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); assert(State.MIs[InsnID]->getOpcode() && "Expected G_CONSTANT"); assert(Predicate > GIPFP_APInt_Invalid && "Expected a valid predicate"); @@ -195,8 +209,10 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckAPFloatImmPredicate: { int64_t InsnID = MatchTable[CurrentIdx++]; int64_t Predicate = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs[" << InsnID - << "], Predicate=" << Predicate << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() + << CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs[" + << InsnID << "], Predicate=" << Predicate << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_FCONSTANT && "Expected G_FCONSTANT"); @@ -211,8 +227,9 @@ bool InstructionSelector::executeMatchTable( } case GIM_CheckNonAtomic: { int64_t InsnID = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckNonAtomic(MIs[" << InsnID - << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckNonAtomic(MIs[" + << InsnID << "])\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); assert((State.MIs[InsnID]->getOpcode() == TargetOpcode::G_LOAD || State.MIs[InsnID]->getOpcode() == TargetOpcode::G_STORE) && @@ -233,9 +250,10 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t TypeID = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "), TypeID=" << TypeID - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID + << "]->getOperand(" << OpIdx + << "), TypeID=" << TypeID << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (MRI.getType(State.MIs[InsnID]->getOperand(OpIdx).getReg()) != MatcherInfo.TypeObjects[TypeID]) { @@ -249,9 +267,10 @@ bool InstructionSelector::executeMatchTable( int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t SizeInBits = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs[" << InsnID - << "]->getOperand(" << OpIdx - << "), SizeInBits=" << SizeInBits << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs[" + << InsnID << "]->getOperand(" << OpIdx + << "), SizeInBits=" << SizeInBits << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); // iPTR must be looked up in the target. @@ -273,9 +292,10 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t RCEnum = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "), RCEnum=" << RCEnum - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs[" + << InsnID << "]->getOperand(" << OpIdx + << "), RCEnum=" << RCEnum << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (&RBI.getRegBankFromRegClass(*TRI.getRegClass(RCEnum)) != RBI.getRegBank(State.MIs[InsnID]->getOperand(OpIdx).getReg(), MRI, @@ -291,10 +311,12 @@ bool InstructionSelector::executeMatchTable( int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t RendererID = MatchTable[CurrentIdx++]; int64_t ComplexPredicateID = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": State.Renderers[" << RendererID - << "] = GIM_CheckComplexPattern(MIs[" << InsnID - << "]->getOperand(" << OpIdx - << "), ComplexPredicateID=" << ComplexPredicateID << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": State.Renderers[" << RendererID + << "] = GIM_CheckComplexPattern(MIs[" << InsnID + << "]->getOperand(" << OpIdx + << "), ComplexPredicateID=" << ComplexPredicateID + << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); // FIXME: Use std::invoke() when it's available. ComplexRendererFns Renderer = @@ -312,9 +334,10 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t Value = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "), Value=" << Value - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs[" + << InsnID << "]->getOperand(" << OpIdx + << "), Value=" << Value << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (!isOperandImmEqual(State.MIs[InsnID]->getOperand(OpIdx), Value, MRI)) { @@ -328,9 +351,10 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t Value = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "), Value=" << Value - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs[" + << InsnID << "]->getOperand(" << OpIdx + << "), Value=" << Value << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); if (!MO.isCImm() || !MO.getCImm()->equalsInt(Value)) { @@ -344,9 +368,10 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t Value = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "), Value=" << Value - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs[" + << InsnID << "]->getOperand(" << OpIdx + << "), Value=" << Value << ")\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); if (!MO.isIntrinsicID() || MO.getIntrinsicID() != Value) @@ -358,8 +383,9 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckIsMBB: { int64_t InsnID = MatchTable[CurrentIdx++]; int64_t OpIdx = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID - << "]->getOperand(" << OpIdx << "))\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID + << "]->getOperand(" << OpIdx << "))\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (!State.MIs[InsnID]->getOperand(OpIdx).isMBB()) { if (handleReject() == RejectAndGiveUp) @@ -370,8 +396,9 @@ bool InstructionSelector::executeMatchTable( case GIM_CheckIsSafeToFold: { int64_t InsnID = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs[" << InsnID - << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs[" + << InsnID << "])\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); if (!isObviouslySafeToFold(*State.MIs[InsnID])) { if (handleReject() == RejectAndGiveUp) @@ -384,9 +411,10 @@ bool InstructionSelector::executeMatchTable( int64_t OpIdx = MatchTable[CurrentIdx++]; int64_t OtherInsnID = MatchTable[CurrentIdx++]; int64_t OtherOpIdx = MatchTable[CurrentIdx++]; - DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs[" << InsnID - << "][" << OpIdx << "], MIs[" << OtherInsnID << "][" - << OtherOpIdx << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs[" + << InsnID << "][" << OpIdx << "], MIs[" + << OtherInsnID << "][" << OtherOpIdx << "])\n"); assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); assert(State.MIs[OtherInsnID] != nullptr && "Used insn before defined"); if (!State.MIs[InsnID]->getOperand(OpIdx).isIdenticalTo( @@ -397,7 +425,8 @@ bool InstructionSelector::executeMatchTable( break; } case GIM_Reject: - DEBUG(dbgs() << CurrentIdx << ": GIM_Reject"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIM_Reject"); if (handleReject() == RejectAndGiveUp) return false; break; @@ -411,8 +440,10 @@ bool InstructionSelector::executeMatchTable( OutMIs.push_back(MachineInstrBuilder(*State.MIs[OldInsnID]->getMF(), State.MIs[OldInsnID])); OutMIs[NewInsnID]->setDesc(TII.get(NewOpcode)); - DEBUG(dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs[" << NewInsnID - << "], MIs[" << OldInsnID << "], " << NewOpcode << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs[" + << NewInsnID << "], MIs[" << OldInsnID << "], " + << NewOpcode << ")\n"); break; } @@ -424,8 +455,9 @@ bool InstructionSelector::executeMatchTable( (void)InsnID; OutMIs.push_back(BuildMI(*State.MIs[0]->getParent(), State.MIs[0], State.MIs[0]->getDebugLoc(), TII.get(Opcode))); - DEBUG(dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs[" << InsnID << "], " - << Opcode << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs[" << InsnID + << "], " << Opcode << ")\n"); break; } @@ -435,8 +467,10 @@ bool InstructionSelector::executeMatchTable( int64_t OpIdx = MatchTable[CurrentIdx++]; assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction"); OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(OpIdx)); - DEBUG(dbgs() << CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID - << "], MIs[" << OldInsnID << "], " << OpIdx << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() + << CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID + << "], MIs[" << OldInsnID << "], " << OpIdx << ")\n"); break; } @@ -451,9 +485,10 @@ bool InstructionSelector::executeMatchTable( OutMIs[NewInsnID].addReg(ZeroReg); else OutMIs[NewInsnID].add(MO); - DEBUG(dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs[" - << NewInsnID << "], MIs[" << OldInsnID << "], " << OpIdx - << ", " << ZeroReg << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs[" + << NewInsnID << "], MIs[" << OldInsnID << "], " + << OpIdx << ", " << ZeroReg << ")\n"); break; } @@ -465,9 +500,10 @@ bool InstructionSelector::executeMatchTable( assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction"); OutMIs[NewInsnID].addReg(State.MIs[OldInsnID]->getOperand(OpIdx).getReg(), 0, SubRegIdx); - DEBUG(dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs[" << NewInsnID - << "], MIs[" << OldInsnID << "], " << OpIdx << ", " - << SubRegIdx << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs[" + << NewInsnID << "], MIs[" << OldInsnID << "], " + << OpIdx << ", " << SubRegIdx << ")\n"); break; } @@ -476,8 +512,9 @@ bool InstructionSelector::executeMatchTable( int64_t RegNum = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); OutMIs[InsnID].addDef(RegNum, RegState::Implicit); - DEBUG(dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs[" << InsnID - << "], " << RegNum << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs[" + << InsnID << "], " << RegNum << ")\n"); break; } @@ -486,8 +523,9 @@ bool InstructionSelector::executeMatchTable( int64_t RegNum = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); OutMIs[InsnID].addUse(RegNum, RegState::Implicit); - DEBUG(dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs[" << InsnID - << "], " << RegNum << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs[" + << InsnID << "], " << RegNum << ")\n"); break; } @@ -496,8 +534,9 @@ bool InstructionSelector::executeMatchTable( int64_t RegNum = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); OutMIs[InsnID].addReg(RegNum); - DEBUG(dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs[" << InsnID - << "], " << RegNum << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs[" + << InsnID << "], " << RegNum << ")\n"); break; } @@ -506,8 +545,9 @@ bool InstructionSelector::executeMatchTable( int64_t Imm = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); OutMIs[InsnID].addImm(Imm); - DEBUG(dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID << "], " - << Imm << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID + << "], " << Imm << ")\n"); break; } @@ -517,8 +557,9 @@ bool InstructionSelector::executeMatchTable( assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); for (const auto &RenderOpFn : State.Renderers[RendererID]) RenderOpFn(OutMIs[InsnID]); - DEBUG(dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs[" << InsnID - << "], " << RendererID << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs[" + << InsnID << "], " << RendererID << ")\n"); break; } case GIR_ComplexSubOperandRenderer: { @@ -527,9 +568,11 @@ bool InstructionSelector::executeMatchTable( int64_t RenderOpID = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); State.Renderers[RendererID][RenderOpID](OutMIs[InsnID]); - DEBUG(dbgs() << CurrentIdx << ": GIR_ComplexSubOperandRenderer(OutMIs[" - << InsnID << "], " << RendererID << ", " << RenderOpID - << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx + << ": GIR_ComplexSubOperandRenderer(OutMIs[" + << InsnID << "], " << RendererID << ", " + << RenderOpID << ")\n"); break; } @@ -545,8 +588,9 @@ bool InstructionSelector::executeMatchTable( OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(1)); else llvm_unreachable("Expected Imm or CImm operand"); - DEBUG(dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs[" << NewInsnID - << "], MIs[" << OldInsnID << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs[" + << NewInsnID << "], MIs[" << OldInsnID << "])\n"); break; } @@ -557,8 +601,10 @@ bool InstructionSelector::executeMatchTable( assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); constrainOperandRegToRegClass(*OutMIs[InsnID].getInstr(), OpIdx, *TRI.getRegClass(RCEnum), TII, TRI, RBI); - DEBUG(dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs[" << InsnID - << "], " << OpIdx << ", " << RCEnum << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs[" + << InsnID << "], " << OpIdx << ", " << RCEnum + << ")\n"); break; } @@ -567,9 +613,10 @@ bool InstructionSelector::executeMatchTable( assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI, RBI); - DEBUG(dbgs() << CurrentIdx - << ": GIR_ConstrainSelectedInstOperands(OutMIs[" << InsnID - << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx + << ": GIR_ConstrainSelectedInstOperands(OutMIs[" + << InsnID << "])\n"); break; } @@ -577,16 +624,18 @@ bool InstructionSelector::executeMatchTable( int64_t InsnID = MatchTable[CurrentIdx++]; assert(OutMIs[InsnID] && "Attempted to add to undefined instruction"); - DEBUG(dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs[" << InsnID - << "]"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs[" + << InsnID << "]"); int64_t MergeInsnID = GIU_MergeMemOperands_EndOfList; while ((MergeInsnID = MatchTable[CurrentIdx++]) != GIU_MergeMemOperands_EndOfList) { - DEBUG(dbgs() << ", MIs[" << MergeInsnID << "]"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << ", MIs[" << MergeInsnID << "]"); for (const auto &MMO : State.MIs[MergeInsnID]->memoperands()) OutMIs[InsnID].addMemOperand(MMO); } - DEBUG(dbgs() << ")\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), dbgs() << ")\n"); break; } @@ -595,13 +644,15 @@ bool InstructionSelector::executeMatchTable( assert(State.MIs[InsnID] && "Attempted to erase an undefined instruction"); State.MIs[InsnID]->eraseFromParent(); - DEBUG(dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs[" << InsnID - << "])\n"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs[" + << InsnID << "])\n"); break; } case GIR_Done: - DEBUG(dbgs() << CurrentIdx << ": GIR_Done"); + DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), + dbgs() << CurrentIdx << ": GIR_Done"); return true; default: diff --git a/include/llvm/module.modulemap b/include/llvm/module.modulemap index cb8ac04a867..b30fbcec7da 100644 --- a/include/llvm/module.modulemap +++ b/include/llvm/module.modulemap @@ -23,7 +23,6 @@ module LLVM_Backend { exclude header "CodeGen/CommandFlags.h" exclude header "CodeGen/LinkAllAsmWriterComponents.h" exclude header "CodeGen/LinkAllCodegenComponents.h" - exclude header "CodeGen/GlobalISel/InstructionSelectorImpl.h" // These are intended for (repeated) textual inclusion. textual header "CodeGen/DIEValue.def" diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index e6b7dca9266..4f4e056cacb 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -20,6 +20,7 @@ #include "AArch64TargetMachine.h" #include "MCTargetDesc/AArch64AddressingModes.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h" #include "llvm/CodeGen/GlobalISel/Utils.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" @@ -33,8 +34,6 @@ #define DEBUG_TYPE "aarch64-isel" -#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h" - using namespace llvm; namespace { @@ -50,6 +49,7 @@ public: const AArch64RegisterBankInfo &RBI); bool select(MachineInstr &I) const override; + static const char *getName() { return DEBUG_TYPE; } private: /// tblgen-erated 'select' implementation, used as the initial selector for diff --git a/lib/Target/ARM/ARMInstructionSelector.cpp b/lib/Target/ARM/ARMInstructionSelector.cpp index d8cfdd9180e..fc61fd85670 100644 --- a/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/lib/Target/ARM/ARMInstructionSelector.cpp @@ -15,14 +15,13 @@ #include "ARMSubtarget.h" #include "ARMTargetMachine.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Support/Debug.h" #define DEBUG_TYPE "arm-isel" -#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h" - using namespace llvm; namespace { @@ -37,6 +36,7 @@ public: const ARMRegisterBankInfo &RBI); bool select(MachineInstr &I) const override; + static const char *getName() { return DEBUG_TYPE; } private: bool selectImpl(MachineInstr &I) const; diff --git a/lib/Target/X86/X86InstructionSelector.cpp b/lib/Target/X86/X86InstructionSelector.cpp index 6bce2558c02..1efe95bf4e8 100644 --- a/lib/Target/X86/X86InstructionSelector.cpp +++ b/lib/Target/X86/X86InstructionSelector.cpp @@ -12,8 +12,6 @@ /// \todo This should be generated by TableGen. //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "X86-isel" - #include "MCTargetDesc/X86BaseInfo.h" #include "X86InstrBuilder.h" #include "X86InstrInfo.h" @@ -48,6 +46,8 @@ #include #include +#define DEBUG_TYPE "X86-isel" + using namespace llvm; namespace { @@ -62,6 +62,7 @@ public: const X86RegisterBankInfo &RBI); bool select(MachineInstr &I) const override; + static const char *getName() { return DEBUG_TYPE; } private: /// tblgen-erated 'select' implementation, used as the initial selector for