Non-affine post-inc SCEV expansions have more code which must be

emitted after the increment. Make sure the insert position
reflects this. This fixes PR6453.

llvm-svn: 97537
This commit is contained in:
Dan Gohman 2010-03-02 01:59:21 +00:00
parent 5990930d72
commit 1625456786
3 changed files with 51 additions and 3 deletions

View File

@ -1087,7 +1087,7 @@ Value *SCEVExpander::expand(const SCEV *S) {
// If the SCEV is computable at this level, insert it into the header
// after the PHIs (and after any other instructions that we've inserted
// there) so that it is guaranteed to dominate any user inside the loop.
if (L && S->hasComputableLoopEvolution(L))
if (L && S->hasComputableLoopEvolution(L) && L != PostIncLoop)
InsertPt = L->getHeader()->getFirstNonPHI();
while (isInsertedInstruction(InsertPt))
InsertPt = llvm::next(BasicBlock::iterator(InsertPt));

View File

@ -2793,8 +2793,12 @@ Value *LSRInstance::Expand(const LSRFixup &LF,
if (Instruction *I =
dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
Inputs.push_back(I);
if (LF.PostIncLoop && !L->contains(LF.UserInst))
Inputs.push_back(L->getLoopLatch()->getTerminator());
if (LF.PostIncLoop) {
if (!L->contains(LF.UserInst))
Inputs.push_back(L->getLoopLatch()->getTerminator());
else
Inputs.push_back(IVIncInsertPos);
}
// Then, climb up the immediate dominator tree as far as we can go while
// still being dominated by the input positions.

View File

@ -0,0 +1,44 @@
; RUN: opt < %s -loop-reduce
; PR6453
target datalayout = "e-p:64:64:64"
define void @_ZNK15PolynomialSpaceILi3EE13compute_indexEjRA3_j() nounwind {
entry:
br label %bb6
bb6:
%t4 = phi i32 [ 0, %entry ], [ %t3, %bb5 ]
%t16 = sub i32 undef, %t4
%t25 = sub i32 undef, %t4
%t26 = add i32 undef, %t25
br label %bb4
bb4:
%t2 = phi i32 [ %t1, %bb3 ], [ 0, %bb6 ]
%t17 = mul i32 %t2, %t16
%t18 = zext i32 %t2 to i33
%t19 = add i32 %t2, -1
%t20 = zext i32 %t19 to i33
%t21 = mul i33 %t18, %t20
%t22 = lshr i33 %t21, 1
%t23 = trunc i33 %t22 to i32
%t24 = sub i32 %t17, %t23
%t27 = add i32 %t24, %t26
br i1 false, label %bb1, label %bb5
bb1:
%t = icmp ugt i32 %t27, undef
br i1 %t, label %bb2, label %bb3
bb3:
%t1 = add i32 %t2, 1
br label %bb4
bb5:
%t3 = add i32 %t4, 1
br label %bb6
bb2:
ret void
}