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[PPC] Enable shuffling of VSX vectors

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This patch fixes PR27078 by enabling shuffling of vectors if VSX is available.

llvm-svn: 268064
This commit is contained in:
Guozhi Wei 2016-04-29 17:00:54 +00:00
parent eb6ddfa0d8
commit 194cccd63b
2 changed files with 17 additions and 4 deletions
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6
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -11940,10 +11940,8 @@ PPCTargetLowering::shouldExpandBuildVectorWithShuffles(
if (VT == MVT::v2i64)
return Subtarget.hasDirectMove(); // Don't need stack ops with direct moves
if (Subtarget.hasQPX()) {
if (VT == MVT::v4f32 || VT == MVT::v4f64 || VT == MVT::v4i1)
return true;
}
if (Subtarget.hasVSX() || Subtarget.hasQPX())
return true;
return TargetLowering::shouldExpandBuildVectorWithShuffles(VT, DefinedValues);
}

15
test/CodeGen/PowerPC/pr27078.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc -mtriple=powerpc64-linux-gnu -mcpu=pwr8 -mattr=+vsx < %s | FileCheck %s
define <4 x float> @bar(float* %p, float* %q) {
%1 = bitcast float* %p to <12 x float>*
%2 = bitcast float* %q to <12 x float>*
%3 = load <12 x float>, <12 x float>* %1, align 16
%4 = load <12 x float>, <12 x float>* %2, align 16
%5 = fsub <12 x float> %4, %3
%6 = shufflevector <12 x float> %5, <12 x float> undef, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
ret <4 x float> %6
; CHECK: vspltw
; CHECK: vmrghw
; CHECK: vsldoi
}