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TableGen: Check if pattern outputs matches instruction defs

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Attempt to fix address sanitizer bots when building ARM.
This commit is contained in:
Matt Arsenault 2020-07-27 20:29:53 -04:00
parent f4701f9f4b
commit 20054fd4b4
1 changed files with 5 additions and 0 deletions
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5
utils/TableGen/GlobalISelEmitter.cpp
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@ -4394,6 +4394,11 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitDefRenderers(
DstMIBuilder.addRenderer<CopyRenderer>(DstI->Operands[0].Name);
// Some instructions have multiple defs, but are missing a type entry
// (e.g. s_cc_out operands).
if (Dst->getExtTypes().size() < NumDefs)
return failedImport("unhandled discarded def");
// Patterns only handle a single result, so any result after the first is an
// implicitly dead def.
for (unsigned I = 1; I < NumDefs; ++I) {