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The Thumb tADDrSPi instruction is not valid when the destination is SP.

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Check for that and try narrowing it to tADDspi instead.  Radar 8724703.

llvm-svn: 120892
This commit is contained in:
Bob Wilson 2010-12-04 04:40:19 +00:00
parent 5917f1a762
commit 20c65a9d33
2 changed files with 19 additions and 1 deletions
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9
lib/Target/ARM/Thumb2SizeReduction.cpp
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@ -58,7 +58,7 @@ namespace {
{ ARM::t2ADDri, ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 0,0, 0 },
{ ARM::t2ADDrr, ARM::tADDrr, ARM::tADDhirr, 0, 0, 1, 0, 0,1, 0 },
// Note: immediate scale is 4.
{ ARM::t2ADDrSPi,ARM::tADDrSPi,0, 8, 0, 1, 0, 1,0, 0 },
{ ARM::t2ADDrSPi,ARM::tADDrSPi,0, 8, 0, 1, 0, 1,0, 1 },
{ ARM::t2ADDSri,ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 2,2, 1 },
{ ARM::t2ADDSrr,ARM::tADDrr, 0, 0, 0, 1, 0, 2,0, 1 },
{ ARM::t2ANDrr, 0, ARM::tAND, 0, 0, 0, 1, 0,0, 0 },
@ -469,6 +469,13 @@ Thumb2SizeReduce::ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI,
return true;
return ReduceToNarrow(MBB, MI, Entry, LiveCPSR);
}
case ARM::t2ADDrSPi: {
static const ReduceEntry NarrowEntry =
{ ARM::t2ADDrSPi,ARM::tADDspi, 0, 7, 0, 1, 0, 1, 0, 1 };
if (MI->getOperand(0).getReg() == ARM::SP)
return ReduceToNarrow(MBB, MI, NarrowEntry, LiveCPSR);
return ReduceToNarrow(MBB, MI, Entry, LiveCPSR);
}
}
return false;
}

11
test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll Normal file
View File

@ -0,0 +1,11 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
; Radar 8724703: Make sure that a t2ADDrSPi instruction with SP as the
; destination register is narrowed to tADDspi instead of tADDrSPi.
define void @test() nounwind {
entry:
; CHECK: sub.w
; CHECK: add.w
%Buffer.i = alloca [512 x i8], align 4
ret void
}