From 295abfe228375aea1268948db584f0f27aab0bd2 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Mon, 30 Jun 2008 20:31:15 +0000 Subject: [PATCH] Replace some std::vectors that showed up in heap profiling with SmallVectors. Change the signature of TargetLowering::LowerArguments to avoid returning a vector by value, and update the two targets which still use this directly, Sparc and IA64, accordingly. llvm-svn: 52917 --- include/llvm/Target/TargetLowering.h | 5 +++-- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 19 +++++++++---------- lib/Target/IA64/IA64ISelLowering.cpp | 7 ++----- lib/Target/IA64/IA64ISelLowering.h | 4 ++-- lib/Target/Sparc/SparcISelLowering.cpp | 8 +++----- lib/Target/Sparc/SparcISelLowering.h | 4 ++-- 6 files changed, 21 insertions(+), 26 deletions(-) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 235f4f232f6..8822a1736ad 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -964,8 +964,9 @@ public: /// LowerArguments - This hook must be implemented to indicate how we should /// lower the arguments for the specified function, into the specified DAG. - virtual std::vector - LowerArguments(Function &F, SelectionDAG &DAG); + virtual void + LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl& ArgValues); /// LowerCallTo - This hook lowers an abstract call to a function into an /// actual call. This returns a pair of operands. The first element is the diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index e8537d2011d..1124f37d2e8 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -474,7 +474,7 @@ class SelectionDAGLowering { /// them up and then emit token factor nodes when possible. This allows us to /// get simple disambiguation between loads without worrying about alias /// analysis. - std::vector PendingLoads; + SmallVector PendingLoads; /// PendingExports - CopyToReg nodes that copy values to virtual registers /// for export to other blocks need to be emitted before any terminator @@ -4612,16 +4612,16 @@ void SelectionDAGLowering::visitVACopy(CallInst &I) { /// implementation, which just inserts a FORMAL_ARGUMENTS node. FIXME: When all /// targets are migrated to using FORMAL_ARGUMENTS, this hook should be /// integrated into SDISel. -std::vector -TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { +void TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl &ArgValues) { // Add CC# and isVararg as operands to the FORMAL_ARGUMENTS node. - std::vector Ops; + SmallVector Ops; Ops.push_back(DAG.getRoot()); Ops.push_back(DAG.getConstant(F.getCallingConv(), getPointerTy())); Ops.push_back(DAG.getConstant(F.isVarArg(), getPointerTy())); // Add one result value for each formal argument. - std::vector RetVals; + SmallVector RetVals; unsigned j = 1; for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I, ++j) { @@ -4699,7 +4699,6 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { DAG.setRoot(SDOperand(Result, NumArgRegs)); // Set up the return result vector. - Ops.clear(); unsigned i = 0; unsigned Idx = 1; for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; @@ -4722,12 +4721,11 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { else if (F.paramHasAttr(Idx, ParamAttr::ZExt)) AssertOp = ISD::AssertZext; - Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, - AssertOp)); + ArgValues.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, + AssertOp)); } } assert(i == NumArgRegs && "Argument register count mismatch!"); - return Ops; } @@ -4951,7 +4949,8 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) { Function &F = *LLVMBB->getParent(); FunctionLoweringInfo &FuncInfo = SDL.FuncInfo; SDOperand OldRoot = SDL.DAG.getRoot(); - std::vector Args = TLI.LowerArguments(F, SDL.DAG); + SmallVector Args; + TLI.LowerArguments(F, SDL.DAG, Args); unsigned a = 0; for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end(); diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp index 8b711d89bd3..710cd0c66d0 100644 --- a/lib/Target/IA64/IA64ISelLowering.cpp +++ b/lib/Target/IA64/IA64ISelLowering.cpp @@ -143,9 +143,8 @@ MVT IA64TargetLowering::getSetCCResultType(const SDOperand &) const { return MVT::i1; } -std::vector -IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { - std::vector ArgValues; +void IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl &ArgValues) { // // add beautiful description of IA64 stack frame format // here (from intel 24535803.pdf most likely) @@ -300,8 +299,6 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { MF.getRegInfo().addLiveOut(IA64::F8); break; } - - return ArgValues; } std::pair diff --git a/lib/Target/IA64/IA64ISelLowering.h b/lib/Target/IA64/IA64ISelLowering.h index b26c8220b4e..54f6c2ed151 100644 --- a/lib/Target/IA64/IA64ISelLowering.h +++ b/lib/Target/IA64/IA64ISelLowering.h @@ -53,8 +53,8 @@ namespace llvm { /// LowerArguments - This hook must be implemented to indicate how we should /// lower the arguments for the specified function, into the specified DAG. - virtual std::vector - LowerArguments(Function &F, SelectionDAG &DAG); + virtual void LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl &ArgValues); /// LowerCallTo - This hook lowers an abstract call to a function into an /// actual call. diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index 48b4fecbf79..fd60296b1f6 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -74,11 +74,11 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { /// LowerArguments - V8 uses a very simple ABI, where all values are passed in /// either one or two GPRs, including FP values. TODO: we should pass FP values /// in FP registers for fastcc functions. -std::vector -SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { +void +SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl &ArgValues) { MachineFunction &MF = DAG.getMachineFunction(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - std::vector ArgValues; static const unsigned ArgRegs[] = { SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 @@ -221,8 +221,6 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { if (!OutChains.empty()) DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, &OutChains[0], OutChains.size())); - - return ArgValues; } static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) { diff --git a/lib/Target/Sparc/SparcISelLowering.h b/lib/Target/Sparc/SparcISelLowering.h index 023ea93d8c5..2257304b7dc 100644 --- a/lib/Target/Sparc/SparcISelLowering.h +++ b/lib/Target/Sparc/SparcISelLowering.h @@ -57,8 +57,8 @@ namespace llvm { const SelectionDAG &DAG, unsigned Depth = 0) const; - virtual std::vector - LowerArguments(Function &F, SelectionDAG &DAG); + virtual void LowerArguments(Function &F, SelectionDAG &DAG, + SmallVectorImpl &ArgValues); virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB);