From 2fd8a66d403100e90c3975b5e15b1ff4023e90f4 Mon Sep 17 00:00:00 2001
From: Misha Brukman <brukman+llvm@gmail.com>
Date: Fri, 16 Jul 2004 20:54:25 +0000
Subject: [PATCH] Fix code formatting

llvm-svn: 14899
---
 lib/Target/PowerPC/PowerPCInstrInfo.cpp | 41 ++++++++++++-------------
 1 file changed, 20 insertions(+), 21 deletions(-)

diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.cpp b/lib/Target/PowerPC/PowerPCInstrInfo.cpp
index 778b55c81fd..490ed18c5c7 100644
--- a/lib/Target/PowerPC/PowerPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PowerPCInstrInfo.cpp
@@ -13,39 +13,38 @@
 
 #include "PowerPCInstrInfo.h"
 #include "PowerPC.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "PowerPCGenInstrInfo.inc"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include <iostream>
 using namespace llvm;
 
 PowerPCInstrInfo::PowerPCInstrInfo()
-  : TargetInstrInfo(PowerPCInsts, sizeof(PowerPCInsts)/sizeof(PowerPCInsts[0])){
-}
+  : TargetInstrInfo(PowerPCInsts, sizeof(PowerPCInsts)/sizeof(PowerPCInsts[0]))
+{ }
 
 bool PowerPCInstrInfo::isMoveInstr(const MachineInstr& MI,
-                               unsigned& sourceReg,
-                               unsigned& destReg) const {
+                                   unsigned& sourceReg,
+                                   unsigned& destReg) const {
   MachineOpCode oc = MI.getOpcode();
   if (oc == PPC32::OR) {
-      assert(MI.getNumOperands() == 3 &&
-             MI.getOperand(0).isRegister() &&
-             MI.getOperand(1).isRegister() &&
-             MI.getOperand(2).isRegister() &&
-             "invalid register-register int move instruction");
-      if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) {
-        sourceReg = MI.getOperand(1).getReg();
-        destReg = MI.getOperand(0).getReg();
-        return true;
-      }
-  }
-  else if (oc == PPC32::FMR) {
-      assert(MI.getNumOperands() == 2 &&
-             MI.getOperand(0).isRegister() &&
-             MI.getOperand(1).isRegister() &&
-             "invalid register-register fp move instruction");
+    assert(MI.getNumOperands() == 3 &&
+           MI.getOperand(0).isRegister() &&
+           MI.getOperand(1).isRegister() &&
+           MI.getOperand(2).isRegister() &&
+           "invalid register-register int move instruction");
+    if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) {
       sourceReg = MI.getOperand(1).getReg();
       destReg = MI.getOperand(0).getReg();
       return true;
+    }
+  } else if (oc == PPC32::FMR) {
+    assert(MI.getNumOperands() == 2 &&
+           MI.getOperand(0).isRegister() &&
+           MI.getOperand(1).isRegister() &&
+           "invalid register-register fp move instruction");
+    sourceReg = MI.getOperand(1).getReg();
+    destReg = MI.getOperand(0).getReg();
+    return true;
   }
   return false;
 }