diff --git a/lib/Target/R600/AMDILIntrinsicInfo.cpp b/lib/Target/R600/AMDILIntrinsicInfo.cpp
index 02d06d6f3d7..70db4e6da2c 100644
--- a/lib/Target/R600/AMDILIntrinsicInfo.cpp
+++ b/lib/Target/R600/AMDILIntrinsicInfo.cpp
@@ -75,5 +75,5 @@ Function*
 AMDGPUIntrinsicInfo::getDeclaration(Module *M, unsigned IntrID,
     Type **Tys,
     unsigned numTys) const  {
-  assert(!"Not implemented");
+  llvm_unreachable("Not implemented");
 }
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
index eaeff4ec217..28d5470b8cc 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -413,7 +413,7 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
         Inst = 1;
         break;
       default:
-        assert(0 && "Wrong buffer id for stream outputs !");
+        llvm_unreachable("Wrong buffer id for stream outputs !");
       }
 
       return InsertScalarToRegisterExport(DAG, Op.getDebugLoc(), OutputsMap,
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index a60a1802d48..79bb97584e2 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -605,6 +605,7 @@ MachineOperand &R600InstrInfo::getFlagOp(MachineInstr *MI, unsigned SrcIdx,
     case MO_FLAG_ABS:
       assert(!IsOP3 && "Cannot set absolute value modifier for OP3 "
                        "instructions.");
+      (void)IsOP3;
       switch (SrcIdx) {
       case 0: FlagIndex = getOperandIdx(*MI, R600Operands::SRC0_ABS); break;
       case 1: FlagIndex = getOperandIdx(*MI, R600Operands::SRC1_ABS); break;