Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
This commit is contained in:
Alexey Samsonov 2013-11-18 09:31:53 +00:00
parent eb2e892703
commit 3bfef6bdb6
115 changed files with 153 additions and 501 deletions

View File

@ -1577,11 +1577,9 @@ public:
std::runtime_error::operator=(toCopy)));
}
~OurCppRunException (void) throw ();
~OurCppRunException (void) throw () {}
};
OurCppRunException::~OurCppRunException() throw () {}
/// Throws foreign C++ exception.
/// @param ignoreIt unused parameter that allows function to match implied

View File

@ -79,39 +79,28 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
public:
NumberExprAST(double val) {}
virtual ~NumberExprAST();
};
NumberExprAST::~NumberExprAST() {}
/// VariableExprAST - Expression class for referencing a variable, like "a".
class VariableExprAST : public ExprAST {
std::string Name;
public:
VariableExprAST(const std::string &name) : Name(name) {}
virtual ~VariableExprAST();
};
VariableExprAST::~VariableExprAST() {}
/// BinaryExprAST - Expression class for a binary operator.
class BinaryExprAST : public ExprAST {
public:
BinaryExprAST(char op, ExprAST *lhs, ExprAST *rhs) {}
virtual ~BinaryExprAST();
};
BinaryExprAST::~BinaryExprAST() {}
/// CallExprAST - Expression class for function calls.
class CallExprAST : public ExprAST {
std::string Callee;
@ -119,11 +108,8 @@ class CallExprAST : public ExprAST {
public:
CallExprAST(const std::string &callee, std::vector<ExprAST*> &args)
: Callee(callee), Args(args) {}
virtual ~CallExprAST();
};
CallExprAST::~CallExprAST() {}
/// PrototypeAST - This class represents the "prototype" for a function,
/// which captures its name, and its argument names (thus implicitly the number
/// of arguments the function takes).

View File

@ -84,12 +84,10 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;

View File

@ -91,12 +91,10 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;

View File

@ -100,12 +100,10 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;

View File

@ -105,12 +105,10 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;

View File

@ -109,12 +109,10 @@ static int gettok() {
/// ExprAST - Base class for all expression nodes.
class ExprAST {
public:
virtual ~ExprAST();
virtual ~ExprAST() {}
virtual Value *Codegen() = 0;
};
ExprAST::~ExprAST() {}
/// NumberExprAST - Expression class for numeric literals like "1.0".
class NumberExprAST : public ExprAST {
double Val;

View File

@ -30,9 +30,8 @@ class PSetIterator;
class MachineRegisterInfo {
public:
class Delegate {
virtual void anchor();
public:
virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0;
virtual void MRI_NoteNewVirtualRegister(unsigned Reg) {}
virtual ~Delegate() {}
};

View File

@ -164,7 +164,6 @@ struct MachineSchedPolicy {
/// Initialization sequence:
/// initPolicy -> shouldTrackPressure -> initialize(DAG) -> registerRoots
class MachineSchedStrategy {
virtual void anchor();
public:
virtual ~MachineSchedStrategy() {}
@ -263,7 +262,6 @@ public:
/// Mutate the DAG as a postpass after normal DAG building.
class ScheduleDAGMutation {
virtual void anchor();
public:
virtual ~ScheduleDAGMutation() {}

View File

@ -33,6 +33,7 @@ class ObjectBuffer {
public:
ObjectBuffer() {}
ObjectBuffer(MemoryBuffer* Buf) : Buffer(Buf) {}
virtual ~ObjectBuffer() {}
/// getMemBuffer - Like MemoryBuffer::getMemBuffer() this function
/// returns a pointer to an object that is owned by the caller. However,
@ -57,6 +58,7 @@ protected:
class ObjectBufferStream : public ObjectBuffer {
public:
ObjectBufferStream() : OS(SV) {}
virtual ~ObjectBufferStream() {}
raw_ostream &getOStream() { return OS; }
void flush()

View File

@ -20,7 +20,6 @@ class Module;
/// ExecutionEngine for the purpose of avoiding compilation for Modules that
/// have already been compiled and an object file is available.
class ObjectCache {
virtual void anchor();
public:
ObjectCache() { }

View File

@ -25,7 +25,6 @@ namespace llvm {
class ObjectImage {
ObjectImage() LLVM_DELETED_FUNCTION;
ObjectImage(const ObjectImage &other) LLVM_DELETED_FUNCTION;
virtual void anchor();
protected:
OwningPtr<ObjectBuffer> Buffer;

View File

@ -32,7 +32,6 @@ class MCDataAtom;
/// \brief Represents a contiguous range of either instructions (a TextAtom)
/// or data (a DataAtom). Address ranges are expressed as _closed_ intervals.
class MCAtom {
virtual void anchor();
public:
virtual ~MCAtom() {}

View File

@ -76,7 +76,6 @@ public:
// FIXME: declared here because it is used from
// lib/CodeGen/AsmPrinter/ARMException.cpp.
class ARMTargetStreamer : public MCTargetStreamer {
virtual void anchor();
public:
virtual void emitFnStart() = 0;
virtual void emitFnEnd() = 0;

View File

@ -19,8 +19,6 @@ namespace llvm {
class MCWinCOFFObjectTargetWriter {
const unsigned Machine;
virtual void anchor();
protected:
MCWinCOFFObjectTargetWriter(unsigned Machine_);

View File

@ -350,9 +350,6 @@ struct cat {
struct GenericOptionValue {
virtual ~GenericOptionValue() {}
virtual bool compare(const GenericOptionValue &V) const = 0;
private:
virtual void anchor();
};
template<class DataType> struct OptionValue;
@ -1755,7 +1752,6 @@ void getRegisteredOptions(StringMap<Option*> &Map);
/// \brief Saves strings in the inheritor's stable storage and returns a stable
/// raw character pointer.
class StringSaver {
virtual void anchor();
public:
virtual const char *SaveString(const char *Str) = 0;
virtual ~StringSaver() {}; // Pacify -Wnon-virtual-dtor.

View File

@ -339,7 +339,6 @@ public:
/// rearrange itself when the pointer changes). Unlike ValueHandleBase, this
/// class has a vtable and a virtual destructor.
class CallbackVH : public ValueHandleBase {
virtual void anchor();
protected:
CallbackVH(const CallbackVH &RHS)
: ValueHandleBase(Callback, RHS) {}
@ -366,13 +365,13 @@ public:
///
/// All implementations must remove the reference from this object to the
/// Value that's being destroyed.
virtual void deleted() { setValPtr(NULL); }
virtual void deleted();
/// Called when this->getValPtr()->replaceAllUsesWith(new_value) is called,
/// _before_ any of the uses have actually been replaced. If WeakVH were
/// implemented as a CallbackVH, it would use this method to call
/// setValPtr(new_value). AssertingVH would do nothing in this method.
virtual void allUsesReplacedWith(Value *) {}
virtual void allUsesReplacedWith(Value *);
};
} // End llvm namespace

View File

@ -105,7 +105,6 @@ private:
/// @brief Abstract base class for all Nodes.
class Node {
virtual void anchor();
public:
enum NodeKind {
NK_Null,
@ -176,7 +175,6 @@ private:
/// Example:
/// !!null null
class NullNode : public Node {
virtual void anchor();
public:
NullNode(OwningPtr<Document> &D)
: Node(NK_Null, D, StringRef(), StringRef()) {}
@ -192,7 +190,6 @@ public:
/// Example:
/// Adena
class ScalarNode : public Node {
virtual void anchor();
public:
ScalarNode(OwningPtr<Document> &D, StringRef Anchor, StringRef Tag,
StringRef Val)
@ -234,7 +231,6 @@ private:
/// Example:
/// Section: .text
class KeyValueNode : public Node {
virtual void anchor();
public:
KeyValueNode(OwningPtr<Document> &D)
: Node(NK_KeyValue, D, StringRef(), StringRef())
@ -346,7 +342,6 @@ void skip(CollectionType &C) {
/// Name: _main
/// Scope: Global
class MappingNode : public Node {
virtual void anchor();
public:
enum MappingType {
MT_Block,
@ -396,7 +391,6 @@ private:
/// - Hello
/// - World
class SequenceNode : public Node {
virtual void anchor();
public:
enum SequenceType {
ST_Block,
@ -452,7 +446,6 @@ private:
/// Example:
/// *AnchorName
class AliasNode : public Node {
virtual void anchor();
public:
AliasNode(OwningPtr<Document> &D, StringRef Val)
: Node(NK_Alias, D, StringRef(), StringRef()), Name(Val) {}

View File

@ -723,7 +723,6 @@ private:
virtual bool canElideEmptySequence();
class HNode {
virtual void anchor();
public:
HNode(Node *n) : _node(n) { }
virtual ~HNode() { }
@ -733,9 +732,9 @@ private:
};
class EmptyHNode : public HNode {
virtual void anchor();
public:
EmptyHNode(Node *n) : HNode(n) { }
virtual ~EmptyHNode() {}
static inline bool classof(const HNode *n) {
return NullNode::classof(n->_node);
}
@ -743,9 +742,9 @@ private:
};
class ScalarHNode : public HNode {
virtual void anchor();
public:
ScalarHNode(Node *n, StringRef s) : HNode(n), _value(s) { }
virtual ~ScalarHNode() { }
StringRef value() const { return _value; }
@ -758,7 +757,6 @@ private:
};
class MapHNode : public HNode {
virtual void anchor();
public:
MapHNode(Node *n) : HNode(n) { }
virtual ~MapHNode();
@ -777,7 +775,6 @@ private:
};
class SequenceHNode : public HNode {
virtual void anchor();
public:
SequenceHNode(Node *n) : HNode(n) { }
virtual ~SequenceHNode();

View File

@ -19,9 +19,6 @@
using namespace llvm;
// pin vtable to this file
void MachineRegisterInfo::Delegate::anchor() {}
MachineRegisterInfo::MachineRegisterInfo(const TargetMachine &TM)
: TM(TM), TheDelegate(0), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);

View File

@ -72,10 +72,6 @@ static cl::opt<bool> VerifyScheduling("verify-misched", cl::Hidden,
// DAG subtrees must have at least this many nodes.
static const unsigned MinSubtreeSize = 8;
// pin vtable to this file
void MachineSchedStrategy::anchor() {}
void ScheduleDAGMutation::anchor() {}
//===----------------------------------------------------------------------===//
// Machine Instruction Scheduling Pass and Registry
//===----------------------------------------------------------------------===//

View File

@ -50,9 +50,6 @@ bool RegAllocBase::VerifyEnabled = false;
// RegAllocBase Implementation
//===----------------------------------------------------------------------===//
// pin vtable to this file
void RegAllocBase::anchor() {}
void RegAllocBase::init(VirtRegMap &vrm,
LiveIntervals &lis,
LiveRegMatrix &mat) {

View File

@ -57,7 +57,6 @@ class Spiller;
/// live range splitting. They must also override enqueue/dequeue to provide an
/// assignment order.
class RegAllocBase {
virtual void anchor();
protected:
const TargetRegisterInfo *TRI;
MachineRegisterInfo *MRI;

View File

@ -15,7 +15,6 @@
#define DEBUG_TYPE "jit"
#include "llvm/ExecutionEngine/ExecutionEngine.h"
#include "llvm/ExecutionEngine/JITMemoryManager.h"
#include "llvm/ExecutionEngine/ObjectCache.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ExecutionEngine/GenericValue.h"
@ -40,9 +39,6 @@ using namespace llvm;
STATISTIC(NumInitBytes, "Number of bytes of global vars initialized");
STATISTIC(NumGlobals , "Number of global vars initialized");
// pin vtable to this file
void ObjectCache::anchor() {}
ExecutionEngine *(*ExecutionEngine::JITCtor)(
Module *M,
std::string *ErrorStr,

View File

@ -16,7 +16,6 @@ namespace llvm {
/// Global access point for the JIT debugging interface.
class JITRegistrar {
virtual void anchor();
public:
/// Instantiates the JIT service.
JITRegistrar() {}

View File

@ -23,7 +23,6 @@ namespace llvm {
class ObjectImageCommon : public ObjectImage {
ObjectImageCommon(); // = delete
ObjectImageCommon(const ObjectImageCommon &other); // = delete
virtual void anchor();
protected:
object::ObjectFile *ObjFile;

View File

@ -13,7 +13,6 @@
#define DEBUG_TYPE "dyld"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "JITRegistrar.h"
#include "ObjectImageCommon.h"
#include "RuntimeDyldELF.h"
#include "RuntimeDyldImpl.h"
@ -29,11 +28,6 @@ using namespace llvm::object;
// Empty out-of-line virtual destructor as the key function.
RuntimeDyldImpl::~RuntimeDyldImpl() {}
// pin JITRegistrar.h and ObjectImage*.h vtables to this file
void JITRegistrar::anchor() {}
void ObjectImage::anchor() {}
void ObjectImageCommon::anchor() {}
namespace llvm {
void RuntimeDyldImpl::registerEHFrames() {

View File

@ -46,6 +46,8 @@ protected:
AttributeImpl(AttrEntryKind KindID) : KindID(KindID) {}
public:
virtual ~AttributeImpl();
bool isEnumAttribute() const { return KindID == EnumAttrEntry; }
bool isAlignAttribute() const { return KindID == AlignAttrEntry; }
bool isStringAttribute() const { return KindID == StringAttrEntry; }

View File

@ -286,6 +286,8 @@ bool Attribute::operator<(Attribute A) const {
// AttributeImpl Definition
//===----------------------------------------------------------------------===//
AttributeImpl::~AttributeImpl() {}
bool AttributeImpl::hasAttribute(Attribute::AttrKind A) const {
if (isStringAttribute()) return false;
return getKindAsEnum() == A;

View File

@ -65,7 +65,7 @@ class MDNodeOperand : public CallbackVH {
public:
MDNodeOperand(Value *V) : CallbackVH(V) {}
virtual ~MDNodeOperand();
~MDNodeOperand() {}
void set(Value *V) {
unsigned IsFirst = this->getValPtrInt();
@ -82,8 +82,6 @@ public:
};
} // end namespace llvm.
MDNodeOperand::~MDNodeOperand() {}
void MDNodeOperand::deleted() {
getParent()->replaceOperand(this, 0);

View File

@ -735,5 +735,9 @@ void ValueHandleBase::ValueIsRAUWd(Value *Old, Value *New) {
#endif
}
// pin vtable to this file
void CallbackVH::anchor() {}
// Default implementation for CallbackVH.
void CallbackVH::allUsesReplacedWith(Value *) {}
void CallbackVH::deleted() {
setValPtr(NULL);
}

View File

@ -14,9 +14,6 @@
using namespace llvm;
// pin vtable to this file
void MCAtom::anchor() {}
void MCAtom::remap(uint64_t NewBegin, uint64_t NewEnd) {
Parent->remap(this, NewBegin, NewEnd);
}

View File

@ -22,9 +22,7 @@
#include <cstdlib>
using namespace llvm;
// pin vtables to this file
MCTargetStreamer::~MCTargetStreamer() {}
void ARMTargetStreamer::anchor() {}
MCStreamer::MCStreamer(MCContext &Ctx, MCTargetStreamer *TargetStreamer)
: Context(Ctx), TargetStreamer(TargetStreamer), EmitEHFrame(true),

View File

@ -138,7 +138,7 @@ public:
symbol_map SymbolMap;
WinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW, raw_ostream &OS);
virtual ~WinCOFFObjectWriter();
~WinCOFFObjectWriter();
COFFSymbol *createSymbol(StringRef Name);
COFFSymbol *GetOrCreateCOFFSymbol(const MCSymbol * Symbol);
@ -898,9 +898,6 @@ MCWinCOFFObjectTargetWriter::MCWinCOFFObjectTargetWriter(unsigned Machine_) :
Machine(Machine_) {
}
// pin vtable to this file
void MCWinCOFFObjectTargetWriter::anchor() {}
//------------------------------------------------------------------------------
// WinCOFFObjectWriter factory function

View File

@ -60,7 +60,6 @@ TEMPLATE_INSTANTIATION(class opt<char>);
TEMPLATE_INSTANTIATION(class opt<bool>);
} } // end namespace llvm::cl
void GenericOptionValue::anchor() {}
void OptionValue<boolOrDefault>::anchor() {}
void OptionValue<std::string>::anchor() {}
void Option::anchor() {}
@ -74,7 +73,6 @@ void parser<double>::anchor() {}
void parser<float>::anchor() {}
void parser<std::string>::anchor() {}
void parser<char>::anchor() {}
void StringSaver::anchor() {}
//===----------------------------------------------------------------------===//

View File

@ -17,7 +17,6 @@
#include "llvm/ADT/Twine.h"
#include "llvm/Config/config.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/Signals.h"
#include "llvm/Support/Threading.h"
#include "llvm/Support/raw_ostream.h"
@ -120,4 +119,3 @@ void LLVMInstallFatalErrorHandler(LLVMFatalErrorHandler Handler) {
void LLVMResetFatalErrorHandler() {
remove_fatal_error_handler();
}

View File

@ -96,15 +96,6 @@ static EncodingInfo getUnicodeEncoding(StringRef Input) {
namespace llvm {
namespace yaml {
/// pin the vtables to this file
void Node::anchor() {}
void NullNode::anchor() {}
void ScalarNode::anchor() {}
void KeyValueNode::anchor() {}
void MappingNode::anchor() {}
void SequenceNode::anchor() {}
void AliasNode::anchor() {}
/// Token - A single YAML token.
struct Token : ilist_node<Token> {
enum TokenKind {

View File

@ -59,13 +59,6 @@ void Input::setDiagHandler(SourceMgr::DiagHandlerTy Handler, void *Ctxt) {
SrcMgr.setDiagHandler(Handler, Ctxt);
}
/// pin the vtables to this file
void Input::HNode::anchor() {}
void Input::EmptyHNode::anchor() {}
void Input::ScalarHNode::anchor() {}
void Input::MapHNode::anchor() {}
void Input::SequenceHNode::anchor() {}
bool Input::outputting() const {
return false;
}

View File

@ -29,7 +29,7 @@
#include <algorithm>
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "AArch64GenInstrInfo.inc"
using namespace llvm;

View File

@ -25,9 +25,6 @@
using namespace llvm;
// pin vtable to this file
void AArch64Subtarget::anchor() {}
AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS)
: AArch64GenSubtargetInfo(TT, CPU, FS), HasFPARMv8(false), HasNEON(false),
HasCrypto(false), TargetTriple(TT), CPUString(CPU) {

View File

@ -27,7 +27,6 @@ class StringRef;
class GlobalValue;
class AArch64Subtarget : public AArch64GenSubtargetInfo {
virtual void anchor();
protected:
bool HasFPARMv8;
bool HasNEON;

View File

@ -37,5 +37,3 @@ AArch64ELFMCAsmInfo::AArch64ELFMCAsmInfo() {
// Exceptions handling
ExceptionsType = ExceptionHandling::DwarfCFI;
}
void AArch64ELFMCAsmInfo::anchor() {}

View File

@ -18,12 +18,9 @@
namespace llvm {
struct AArch64ELFMCAsmInfo : public MCAsmInfoELF {
explicit AArch64ELFMCAsmInfo();
private:
virtual void anchor();
};
struct AArch64ELFMCAsmInfo : public MCAsmInfoELF {
explicit AArch64ELFMCAsmInfo();
};
} // namespace llvm

View File

@ -37,7 +37,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "ARMGenInstrInfo.inc"
using namespace llvm;

View File

@ -17,7 +17,6 @@ add_llvm_target(HexagonCodeGen
HexagonFrameLowering.cpp
HexagonHardwareLoops.cpp
HexagonFixupHwLoops.cpp
HexagonMachineFunctionInfo.cpp
HexagonMachineScheduler.cpp
HexagonMCInstLower.cpp
HexagonInstrInfo.cpp

View File

@ -26,7 +26,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#define GET_INSTRMAP_INFO
#include "HexagonGenInstrInfo.inc"
#include "HexagonGenDFAPacketizer.inc"
@ -55,8 +55,6 @@ const int Hexagon_MEMH_AUTOINC_MIN = -16;
const int Hexagon_MEMB_AUTOINC_MAX = 7;
const int Hexagon_MEMB_AUTOINC_MIN = -8;
// pin vtable to this file
void HexagonInstrInfo::anchor() {}
HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST)
: HexagonGenInstrInfo(Hexagon::ADJCALLSTACKDOWN, Hexagon::ADJCALLSTACKUP),

View File

@ -30,8 +30,6 @@ class HexagonInstrInfo : public HexagonGenInstrInfo {
const HexagonSubtarget &Subtarget;
typedef unsigned Opcode_t;
virtual void anchor();
public:
explicit HexagonInstrInfo(HexagonSubtarget &ST);

View File

@ -1,16 +0,0 @@
//= HexagonMachineFunctionInfo.cpp - Hexagon machine function info *- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "HexagonMachineFunctionInfo.h"
using namespace llvm;
// pin vtable to this file
void HexagonMachineFunctionInfo::anchor() {}

View File

@ -1,4 +1,4 @@
//=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=//
//=- HexagonMachineFuctionInfo.h - Hexagon machine function info --*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
@ -10,7 +10,6 @@
#ifndef HexagonMACHINEFUNCTIONINFO_H
#define HexagonMACHINEFUNCTIONINFO_H
#include <map>
#include "llvm/CodeGen/MachineFunction.h"
namespace llvm {
@ -34,7 +33,6 @@ class HexagonMachineFunctionInfo : public MachineFunctionInfo {
std::map<const MachineInstr*, unsigned> PacketInfo;
virtual void anchor();
public:
HexagonMachineFunctionInfo() : SRetReturnReg(0), HasClobberLR(0),

View File

@ -86,4 +86,3 @@ HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS):
ModeIEEERndNear = false;
}
HexagonSubtarget::~HexagonSubtarget() {}

View File

@ -42,7 +42,6 @@ public:
public:
HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS);
virtual ~HexagonSubtarget();
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.

View File

@ -15,9 +15,6 @@
using namespace llvm;
// pin vtable to this file
void HexagonMCAsmInfo::anchor() {}
HexagonMCAsmInfo::HexagonMCAsmInfo(StringRef TT) {
Data16bitsDirective = "\t.half\t";
Data32bitsDirective = "\t.word\t";

View File

@ -19,7 +19,6 @@
namespace llvm {
class HexagonMCAsmInfo : public MCAsmInfoELF {
virtual void anchor();
public:
explicit HexagonMCAsmInfo(StringRef TT);
};

View File

@ -22,14 +22,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "MSP430GenInstrInfo.inc"
using namespace llvm;
// pin vtable to this file
void MSP430InstrInfo::anchor() {}
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
: MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
RI(tm) {}

View File

@ -42,7 +42,6 @@ namespace MSP430II {
class MSP430InstrInfo : public MSP430GenInstrInfo {
const MSP430RegisterInfo RI;
virtual void anchor();
public:
explicit MSP430InstrInfo(MSP430TargetMachine &TM);

View File

@ -42,9 +42,6 @@ using namespace llvm;
static cl::opt<bool> PrintHackDirectives("print-hack-directives",
cl::init(false), cl::Hidden);
// pin vtable to this file
void MipsTargetStreamer::anchor() {}
static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
std::string MipsArchFeature;
size_t DashPosition = 0;

View File

@ -22,14 +22,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "MipsGenInstrInfo.inc"
using namespace llvm;
// pin vtable to this file
void MipsInstrInfo::anchor() {}
MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm, unsigned UncondBr)
: MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
TM(tm), UncondBrOpc(UncondBr) {}

View File

@ -27,7 +27,6 @@
namespace llvm {
class MipsInstrInfo : public MipsGenInstrInfo {
virtual void anchor();
protected:
MipsTargetMachine &TM;
unsigned UncondBrOpc;

View File

@ -14,7 +14,6 @@
namespace llvm {
class MipsTargetStreamer : public MCTargetStreamer {
virtual void anchor();
public:
virtual void emitMipsHackELFFlags(unsigned Flags) = 0;
virtual void emitMipsHackSTOCG(MCSymbol *Sym, unsigned Val) = 0;

View File

@ -2288,29 +2288,3 @@ void NVPTXTargetLowering::ReplaceNodeResults(
return;
}
}
// pin NVPTXSection.h and NVPTXTargetObjectFile.h vtables to this file
void NVPTXSection::anchor() {}
NVPTXTargetObjectFile::~NVPTXTargetObjectFile() {
delete TextSection;
delete DataSection;
delete BSSSection;
delete ReadOnlySection;
delete StaticCtorSection;
delete StaticDtorSection;
delete LSDASection;
delete EHFrameSection;
delete DwarfAbbrevSection;
delete DwarfInfoSection;
delete DwarfLineSection;
delete DwarfFrameSection;
delete DwarfPubTypesSection;
delete DwarfDebugInlineSection;
delete DwarfStrSection;
delete DwarfLocSection;
delete DwarfARangesSection;
delete DwarfRangesSection;
delete DwarfMacroInfoSection;
}

View File

@ -14,7 +14,7 @@
#include "NVPTX.h"
#include "NVPTXInstrInfo.h"
#include "NVPTXTargetMachine.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "NVPTXGenInstrInfo.inc"
#include "llvm/IR/Function.h"
#include "llvm/ADT/STLExtras.h"
@ -24,9 +24,6 @@
using namespace llvm;
// pin vtable to this file
void NVPTXInstrInfo::anchor() {}
// FIXME: Add the subtarget support on this constructor.
NVPTXInstrInfo::NVPTXInstrInfo(NVPTXTargetMachine &tm)
: NVPTXGenInstrInfo(), TM(tm), RegInfo(*TM.getSubtargetImpl()) {}

View File

@ -26,7 +26,6 @@ namespace llvm {
class NVPTXInstrInfo : public NVPTXGenInstrInfo {
NVPTXTargetMachine &TM;
const NVPTXRegisterInfo RegInfo;
virtual void anchor();
public:
explicit NVPTXInstrInfo(NVPTXTargetMachine &TM);

View File

@ -24,10 +24,10 @@ namespace llvm {
/// the ASMPrint interface.
///
class NVPTXSection : public MCSection {
virtual void anchor();
public:
NVPTXSection(SectionVariant V, SectionKind K) : MCSection(V, K) {}
virtual ~NVPTXSection() {}
~NVPTXSection() {}
/// Override this as NVPTX has its own way of printing switching
/// to a section.

View File

@ -20,9 +20,6 @@
using namespace llvm;
// pin vtable to this file
void NVPTXSubtarget::anchor() {}
NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0),

View File

@ -36,8 +36,6 @@ class NVPTXSubtarget : public NVPTXGenSubtargetInfo {
// SM version x.y is represented as 10*x+y, e.g. 3.1 == 31
unsigned int SmVersion;
virtual void anchor();
public:
/// This constructor initializes the data members to match that
/// of the specified module.

View File

@ -44,7 +44,28 @@ public:
DwarfMacroInfoSection = 0;
}
virtual ~NVPTXTargetObjectFile();
~NVPTXTargetObjectFile() {
delete TextSection;
delete DataSection;
delete BSSSection;
delete ReadOnlySection;
delete StaticCtorSection;
delete StaticDtorSection;
delete LSDASection;
delete EHFrameSection;
delete DwarfAbbrevSection;
delete DwarfInfoSection;
delete DwarfLineSection;
delete DwarfFrameSection;
delete DwarfPubTypesSection;
delete DwarfDebugInlineSection;
delete DwarfStrSection;
delete DwarfLocSection;
delete DwarfARangesSection;
delete DwarfRangesSection;
delete DwarfMacroInfoSection;
}
virtual void Initialize(MCContext &ctx, const TargetMachine &TM) {
TargetLoweringObjectFile::Initialize(ctx, TM);

View File

@ -37,9 +37,6 @@
using namespace llvm;
// pin vtable to this file
PPCTargetStreamer::~PPCTargetStreamer() {}
static MCInstrInfo *createPPCMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitPPCMCInstrInfo(X);

View File

@ -33,7 +33,7 @@
#include "llvm/Support/raw_ostream.h"
#define GET_INSTRMAP_INFO
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "PPCGenInstrInfo.inc"
using namespace llvm;
@ -45,9 +45,6 @@ opt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden,
static cl::opt<bool> DisableCmpOpt("disable-ppc-cmp-opt",
cl::desc("Disable compare instruction optimization"), cl::Hidden);
//pin vtable to this file
void PPCInstrInfo::anchor() {}
PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
: PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
TM(tm), RI(*TM.getSubtargetImpl()) {}

View File

@ -78,7 +78,6 @@ class PPCInstrInfo : public PPCGenInstrInfo {
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs,
bool &NonRI, bool &SpillsVRS) const;
virtual void anchor();
public:
explicit PPCInstrInfo(PPCTargetMachine &TM);

View File

@ -15,7 +15,6 @@
namespace llvm {
class PPCTargetStreamer : public MCTargetStreamer {
public:
virtual ~PPCTargetStreamer();
virtual void emitTCEntry(const MCSymbol &S) = 0;
};
}

View File

@ -20,17 +20,13 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#define GET_INSTRINFO_NAMED_OPS
#define GET_INSTRMAP_INFO
#include "AMDGPUGenInstrInfo.inc"
using namespace llvm;
// pin vtable to this file
void AMDGPUInstrInfo::anchor() {}
AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm)
: AMDGPUGenInstrInfo(-1,-1), RI(tm), TM(tm) { }

View File

@ -43,7 +43,6 @@ private:
const AMDGPURegisterInfo RI;
bool getNextBranchInstr(MachineBasicBlock::iterator &iter,
MachineBasicBlock &MBB) const;
virtual void anchor();
protected:
TargetMachine &TM;
public:

View File

@ -6,9 +6,6 @@ using namespace llvm;
static const char *const ShaderTypeAttribute = "ShaderType";
// pin vtable to this file
void AMDGPUMachineFunction::anchor() {}
AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
MachineFunctionInfo() {
ShaderType = ShaderType::COMPUTE;

View File

@ -19,7 +19,6 @@
namespace llvm {
class AMDGPUMachineFunction : public MachineFunctionInfo {
virtual void anchor();
public:
AMDGPUMachineFunction(const MachineFunction &MF);
unsigned ShaderType;

View File

@ -1,21 +0,0 @@
//===-- AMDGPUCodeEmitter.cpp - AMDGPU Code Emitter interface -------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
/// \file
/// \brief CodeEmitter interface for R600 and SI codegen.
//
//===----------------------------------------------------------------------===//
#include "AMDGPUMCCodeEmitter.h"
using namespace llvm;
// pin vtable to this file
void AMDGPUMCCodeEmitter::anchor() {}

View File

@ -24,7 +24,6 @@ class MCInst;
class MCOperand;
class AMDGPUMCCodeEmitter : public MCCodeEmitter {
virtual void anchor();
public:
uint64_t getBinaryCodeForInstr(const MCInst &MI,

View File

@ -2,7 +2,6 @@
add_llvm_library(LLVMR600Desc
AMDGPUAsmBackend.cpp
AMDGPUELFObjectWriter.cpp
AMDGPUMCCodeEmitter.cpp
AMDGPUMCTargetDesc.cpp
AMDGPUMCAsmInfo.cpp
R600MCCodeEmitter.cpp

View File

@ -23,7 +23,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "AMDGPUGenDFAPacketizer.inc"
using namespace llvm;

View File

@ -12,9 +12,7 @@
using namespace llvm;
// pin vtable to this file
void R600MachineFunctionInfo::anchor() {}
R600MachineFunctionInfo::R600MachineFunctionInfo(const MachineFunction &MF)
: AMDGPUMachineFunction(MF) { }

View File

@ -21,7 +21,6 @@
namespace llvm {
class R600MachineFunctionInfo : public AMDGPUMachineFunction {
virtual void anchor();
public:
R600MachineFunctionInfo(const MachineFunction &MF);
SmallVector<unsigned, 4> LiveOuts;

View File

@ -13,10 +13,6 @@
using namespace llvm;
// pin vtable to this file
void SIMachineFunctionInfo::anchor() {}
SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
: AMDGPUMachineFunction(MF),
PSInputAddr(0) { }

View File

@ -22,7 +22,6 @@ namespace llvm {
/// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
/// tells the hardware which interpolation parameters to load.
class SIMachineFunctionInfo : public AMDGPUMachineFunction {
virtual void anchor();
public:
SIMachineFunctionInfo(const MachineFunction &MF);
unsigned PSInputAddr;

View File

@ -24,15 +24,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "SparcGenInstrInfo.inc"
using namespace llvm;
// pin vtable to this file
void SparcInstrInfo::anchor() {}
SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
: SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP),
RI(ST), Subtarget(ST) {

View File

@ -37,7 +37,6 @@ namespace SPII {
class SparcInstrInfo : public SparcGenInstrInfo {
const SparcRegisterInfo RI;
const SparcSubtarget& Subtarget;
virtual void anchor();
public:
explicit SparcInstrInfo(SparcSubtarget &ST);

View File

@ -21,7 +21,6 @@ add_llvm_target(SystemZCodeGen
SystemZISelLowering.cpp
SystemZInstrInfo.cpp
SystemZLongBranch.cpp
SystemZMachineFunctionInfo.cpp
SystemZMCInstLower.cpp
SystemZRegisterInfo.cpp
SystemZSelectionDAGInfo.cpp

View File

@ -17,7 +17,7 @@
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#define GET_INSTRMAP_INFO
#include "SystemZGenInstrInfo.inc"
@ -37,9 +37,6 @@ static bool isHighReg(unsigned int Reg) {
return false;
}
// pin vtable to this file
void SystemZInstrInfo::anchor() {}
SystemZInstrInfo::SystemZInstrInfo(SystemZTargetMachine &tm)
: SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
RI(tm), TM(tm) {

View File

@ -127,7 +127,6 @@ class SystemZInstrInfo : public SystemZGenInstrInfo {
void emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
DebugLoc DL, unsigned DestReg, unsigned SrcReg,
unsigned LowLowOpcode, unsigned Size, bool KillSrc) const;
virtual void anchor();
public:
explicit SystemZInstrInfo(SystemZTargetMachine &TM);

View File

@ -1,17 +0,0 @@
//== SystemZMachineFuctionInfo.cpp - SystemZ machine function info-*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "SystemZMachineFunctionInfo.h"
using namespace llvm;
// pin vtable to this file
void SystemZMachineFunctionInfo::anchor() {}

View File

@ -23,8 +23,6 @@ class SystemZMachineFunctionInfo : public MachineFunctionInfo {
unsigned RegSaveFrameIndex;
bool ManipulatesSP;
virtual void anchor();
public:
explicit SystemZMachineFunctionInfo(MachineFunction &MF)
: LowSavedGPR(0), HighSavedGPR(0), VarArgsFirstGPR(0), VarArgsFirstFPR(0),

View File

@ -18,9 +18,6 @@
using namespace llvm;
// pin vtabel to this file
void SystemZSubtarget::anchor() {}
SystemZSubtarget::SystemZSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS)

View File

@ -26,7 +26,6 @@ class GlobalValue;
class StringRef;
class SystemZSubtarget : public SystemZGenSubtargetInfo {
virtual void anchor();
protected:
bool HasDistinctOps;
bool HasLoadStoreOnCond;

View File

@ -27,7 +27,7 @@ namespace {
public:
X86WinCOFFObjectWriter(bool Is64Bit_);
virtual ~X86WinCOFFObjectWriter();
~X86WinCOFFObjectWriter();
virtual unsigned getRelocType(const MCValue &Target,
const MCFixup &Fixup,

View File

@ -36,7 +36,7 @@
#include "llvm/Target/TargetOptions.h"
#include <limits>
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "X86GenInstrInfo.inc"
using namespace llvm;
@ -92,9 +92,6 @@ struct X86OpTblEntry {
uint16_t Flags;
};
// pin vtable to this file
void X86InstrInfo::anchor() {}
X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
: X86GenInstrInfo((tm.getSubtarget<X86Subtarget>().is64Bit()
? X86::ADJCALLSTACKDOWN64

View File

@ -152,8 +152,6 @@ class X86InstrInfo : public X86GenInstrInfo {
MemOp2RegOpTableType &M2RTable,
unsigned RegOp, unsigned MemOp, unsigned Flags);
virtual void anchor();
public:
explicit X86InstrInfo(X86TargetMachine &tm);

View File

@ -22,7 +22,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR
#include "XCoreGenInstrInfo.inc"
namespace llvm {
@ -39,10 +39,6 @@ namespace XCore {
using namespace llvm;
// pin vtable to this file
void XCoreInstrInfo::anchor() {}
XCoreInstrInfo::XCoreInstrInfo()
: XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
RI() {

View File

@ -24,7 +24,6 @@ namespace llvm {
class XCoreInstrInfo : public XCoreGenInstrInfo {
const XCoreRegisterInfo RI;
virtual void anchor();
public:
XCoreInstrInfo();

View File

@ -128,7 +128,7 @@ public:
BB(Block),PT(PT),Ran(R),Context(BB->getContext()) {}
/// virtual D'tor to silence warnings.
virtual ~Modifier();
virtual ~Modifier() {}
/// Add a new instruction.
virtual void Act() = 0;
@ -285,11 +285,8 @@ protected:
LLVMContext &Context;
};
Modifier::~Modifier() {}
struct LoadModifier: public Modifier {
LoadModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~LoadModifier();
virtual void Act() {
// Try to use predefined pointers. If non exist, use undef pointer value;
Value *Ptr = getRandomPointerValue();
@ -298,11 +295,8 @@ struct LoadModifier: public Modifier {
}
};
LoadModifier::~LoadModifier() {}
struct StoreModifier: public Modifier {
StoreModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~StoreModifier();
virtual void Act() {
// Try to use predefined pointers. If non exist, use undef pointer value;
Value *Ptr = getRandomPointerValue();
@ -319,11 +313,8 @@ struct StoreModifier: public Modifier {
}
};
StoreModifier::~StoreModifier() {}
struct BinModifier: public Modifier {
BinModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~BinModifier();
virtual void Act() {
Value *Val0 = getRandomVal();
@ -365,13 +356,9 @@ struct BinModifier: public Modifier {
}
};
BinModifier::~BinModifier() {}
/// Generate constant values.
struct ConstModifier: public Modifier {
ConstModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~ConstModifier();
virtual void Act() {
Type *Ty = pickType();
@ -416,11 +403,8 @@ struct ConstModifier: public Modifier {
}
};
ConstModifier::~ConstModifier() {}
struct AllocaModifier: public Modifier {
AllocaModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R){}
virtual ~AllocaModifier();
virtual void Act() {
Type *Tp = pickType();
@ -428,12 +412,9 @@ struct AllocaModifier: public Modifier {
}
};
AllocaModifier::~AllocaModifier() {}
struct ExtractElementModifier: public Modifier {
ExtractElementModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
virtual ~ExtractElementModifier();
virtual void Act() {
Value *Val0 = getRandomVectorValue();
@ -445,12 +426,8 @@ struct ExtractElementModifier: public Modifier {
}
};
ExtractElementModifier::~ExtractElementModifier() {}
struct ShuffModifier: public Modifier {
ShuffModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~ShuffModifier();
virtual void Act() {
Value *Val0 = getRandomVectorValue();
@ -476,12 +453,9 @@ struct ShuffModifier: public Modifier {
}
};
ShuffModifier::~ShuffModifier() {}
struct InsertElementModifier: public Modifier {
InsertElementModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
virtual ~InsertElementModifier();
virtual void Act() {
Value *Val0 = getRandomVectorValue();
@ -496,12 +470,8 @@ struct InsertElementModifier: public Modifier {
};
InsertElementModifier::~InsertElementModifier() {}
struct CastModifier: public Modifier {
CastModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~CastModifier();
virtual void Act() {
Value *V = getRandomVal();
@ -585,12 +555,9 @@ struct CastModifier: public Modifier {
};
CastModifier::~CastModifier() {}
struct SelectModifier: public Modifier {
SelectModifier(BasicBlock *BB, PieceTable *PT, Random *R):
Modifier(BB, PT, R) {}
virtual ~SelectModifier();
virtual void Act() {
// Try a bunch of different select configuration until a valid one is found.
@ -612,12 +579,9 @@ struct SelectModifier: public Modifier {
}
};
SelectModifier::~SelectModifier() {}
struct CmpModifier: public Modifier {
CmpModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
virtual ~CmpModifier();
virtual void Act() {
Value *Val0 = getRandomVal();
@ -643,8 +607,6 @@ struct CmpModifier: public Modifier {
}
};
CmpModifier::~CmpModifier() {}
void FillFunction(Function *F, Random &R) {
// Create a legal entry block.
BasicBlock *BB = BasicBlock::Create(F->getContext(), "BB", F);

View File

@ -13,11 +13,9 @@
namespace llvm {
struct VirtualRefCounted : public RefCountedBaseVPTR {
virtual void f();
virtual void f() {}
};
void VirtualRefCounted::f() {}
// Run this test with valgrind to detect memory leaks.
TEST(IntrusiveRefCntPtr, RefCountedBaseVPTRCopyDoesNotLeak) {
VirtualRefCounted *V1 = new VirtualRefCounted;

View File

@ -83,7 +83,13 @@ protected:
UnsupportedOSs.push_back(Triple::Cygwin);
}
virtual void SetUp();
virtual void SetUp() {
didCallAllocateCodeSection = false;
Module = 0;
Function = 0;
Engine = 0;
Error = 0;
}
virtual void TearDown() {
if (Engine)
@ -151,14 +157,6 @@ protected:
char *Error;
};
void MCJITCAPITest::SetUp() {
didCallAllocateCodeSection = false;
Module = 0;
Function = 0;
Engine = 0;
Error = 0;
}
TEST_F(MCJITCAPITest, simple_function) {
SKIP_UNSUPPORTED_PLATFORM;

View File

@ -18,13 +18,7 @@
using namespace llvm;
class MCJITMultipleModuleTest : public testing::Test,
public MCJITTestBase {
public:
virtual ~MCJITMultipleModuleTest();
};
MCJITMultipleModuleTest::~MCJITMultipleModuleTest() {}
class MCJITMultipleModuleTest : public testing::Test, public MCJITTestBase {};
namespace {

Some files were not shown because too many files have changed in this diff Show More