From 4f6143167947ecbab0b296858e01179a0f296c88 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Mon, 16 Oct 2006 21:10:32 +0000 Subject: [PATCH] expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS llvm-svn: 30987 --- lib/Target/ARM/ARMAsmPrinter.cpp | 3 +-- lib/Target/ARM/ARMISelDAGToDAG.cpp | 15 +++++++++++---- lib/Target/ARM/ARMInstrInfo.td | 10 ++++++++-- test/Regression/CodeGen/ARM/longarith.ll | 24 ++++++++++++++++++++++++ 4 files changed, 44 insertions(+), 8 deletions(-) create mode 100644 test/Regression/CodeGen/ARM/longarith.ll diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index d0005a8dd2f..8a0f113c5d9 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -216,8 +216,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) { } break; case MachineOperand::MO_ExternalSymbol: - assert(0 && "not implemented"); - abort(); + O << TAI->getGlobalPrefix() << MO.getSymbolName(); break; case MachineOperand::MO_ConstantPoolIndex: O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 2b796a7a189..905d9620e20 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -72,6 +72,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::BRCOND, MVT::Other, Expand); + setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); + setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); + setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); + setOperationAction(ISD::VASTART, MVT::Other, Custom); setOperationAction(ISD::VAEND, MVT::Other, Expand); @@ -321,11 +325,14 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) { Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOpChains[0], MemOpChains.size()); - // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every - // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol - // node so that legalize doesn't hack it. + // If the callee is a GlobalAddress node (quite common, every direct call is) + // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. + // Likewise ExternalSymbol -> TargetExternalSymbol. + assert(Callee.getValueType() == MVT::i32); if (GlobalAddressSDNode *G = dyn_cast(Callee)) - Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType()); + Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32); + else if (ExternalSymbolSDNode *E = dyn_cast(Callee)) + Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32); // If this is a direct call, pass the chain and the callee. assert (Callee.Val); diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index cacff859af2..ca3d1c2aecb 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -128,8 +128,8 @@ let isReturn = 1 in { def bx: InstARM<(ops), "bx r14", [(retflag)]>; } -let Defs = [R0, R1, R2, R3, R14] in { - def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall tglobaladdr:$func)]>; +let noResults = 1, Defs = [R0, R1, R2, R3, R14] in { + def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", []>; } def ldr : InstARM<(ops IntRegs:$dst, memri:$addr), @@ -286,3 +286,9 @@ def FLDS : InstARM<(ops FPRegs:$dst, IntRegs:$addr), def FLDD : InstARM<(ops DFPRegs:$dst, IntRegs:$addr), "fldd $dst, $addr", [(set DFPRegs:$dst, (load IntRegs:$addr))]>; + +def : Pat<(ARMcall tglobaladdr:$dst), + (bl tglobaladdr:$dst)>; + +def : Pat<(ARMcall texternalsym:$dst), + (bl texternalsym:$dst)>; diff --git a/test/Regression/CodeGen/ARM/longarith.ll b/test/Regression/CodeGen/ARM/longarith.ll new file mode 100644 index 00000000000..ecf66c1cc8f --- /dev/null +++ b/test/Regression/CodeGen/ARM/longarith.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=arm && +; RUN: llvm-as < %s | llc -march=arm | grep __ashldi3 && +; RUN: llvm-as < %s | llc -march=arm | grep __ashrdi3 && +; RUN: llvm-as < %s | llc -march=arm | grep __lshrdi3 +uint %f1(ulong %x, ubyte %y) { +entry: + %a = shl ulong %x, ubyte %y + %b = cast ulong %a to uint + ret uint %b +} + +uint %f2(long %x, ubyte %y) { +entry: + %a = shr long %x, ubyte %y + %b = cast long %a to uint + ret uint %b +} + +uint %f3(ulong %x, ubyte %y) { +entry: + %a = shr ulong %x, ubyte %y + %b = cast ulong %a to uint + ret uint %b +}