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[mips] Add tail call instructions.
llvm-svn: 166338
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@ -177,6 +177,7 @@ def BLTZ64 : CBranchZero<0x01, 0, "bltz", setlt, CPU64Regs>;
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}
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let DecoderNamespace = "Mips64" in
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def JALR64 : JumpLinkReg<0x00, 0x09, "jalr", CPU64Regs>;
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def TAILCALL64_R : JumpFR<CPU64Regs, MipsTailCall>, IsTailCall;
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let DecoderNamespace = "Mips64" in {
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/// Multiply and Divide Instructions.
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@ -191,6 +191,15 @@ class IsCall {
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bit isCall = 1;
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}
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class IsTailCall {
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bit isCall = 1;
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bit isTerminator = 1;
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bit isReturn = 1;
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bit isBarrier = 1;
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bit hasExtraSrcRegAllocReq = 1;
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bit isCodeGenOnly = 1;
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}
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//===----------------------------------------------------------------------===//
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// Instruction format superclass
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//===----------------------------------------------------------------------===//
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@ -1013,6 +1022,8 @@ def JAL : JumpLink<0x03, "jal">;
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def JALR : JumpLinkReg<0x00, 0x09, "jalr", CPURegs>;
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def BGEZAL : BranchLink<"bgezal", 0x11, CPURegs>;
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def BLTZAL : BranchLink<"bltzal", 0x10, CPURegs>;
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def TAILCALL : JumpFJ<0x02, "j", br>, IsTailCall;
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def TAILCALL_R : JumpFR<CPURegs, MipsTailCall>, IsTailCall;
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def RET : RetBase<CPURegs>;
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