[AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests

When these tests were originally written, the middle end would introduce
an unnecessary copy from r24:r23->GPR16->r24:r23, and these tests
mistakenly relied on it.

The most optimal codegen for the functions in the test cases before this patch
would be NOPs. This is because the first i16 argument always gets the same register
allocation as an i16 return value in the AVR calling convention.

These tests broke in r362963 when the codegen was improved and the
redundant copy was eliminated. After this, the test functions
were lowered to their optimal form - a 'ret' and nothing else.

This patch prepends an extra i16 operand to each of the test functions
so that a 16-bit copy must be inserted for the program to be correct.

llvm-svn: 363131
This commit is contained in:
Dylan McKay 2019-06-12 08:31:07 +00:00
parent 8733a60c96
commit 5892dcede7
2 changed files with 5 additions and 5 deletions

View File

@ -1,9 +1,9 @@
; RUN: llc -mattr=avrtiny -O0 < %s -march=avr | FileCheck %s
define i16 @reg_copy16(i16 %a) {
define i16 @reg_copy16(i16, i16 %a) {
; CHECK-LABEL: reg_copy16
; CHECK: mov r18, r24
; CHECK: mov r19, r25
; CHECK: mov r24, r22
; CHECK: mov r25, r23
ret i16 %a
}

View File

@ -1,8 +1,8 @@
; RUN: llc -mattr=avr25 -O0 < %s -march=avr | FileCheck %s
; On most cores, the 16-bit 'MOVW' instruction can be used
define i16 @reg_copy16(i16 %a) {
define i16 @reg_copy16(i16, i16 %a) {
; CHECK-LABEL: reg_copy16
; CHECK: movw r18, r24
; CHECK: movw r24, r22
ret i16 %a
}