diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 734940806f7..ffe20833228 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -752,10 +752,7 @@ static bool regIsPICBase(unsigned BaseReg, MachineRegisterInfo &MRI) {
 /// isGVStub - Return true if the GV requires an extra load to get the
 /// real address.
 static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) {
-  return false;
-  /* Temporarily disabled.
   return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
-  */
 }
  
 bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
@@ -1828,15 +1825,7 @@ X86InstrInfo::foldMemoryOperand(MachineInstr *MI, unsigned i,
       MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { 
     OpcodeTablePtr = &RegOp2MemOpTable2Addr;
     isTwoAddrFold = true;
-    // Can't write back to CPI or a GV stub.
-    if (MOs[3].isCPI() ||
-        (MOs[3].isGlobal() && isGVStub(MOs[3].getGlobal(), TM)))
-      return NULL;
   } else if (i == 0) { // If operand 0
-    // Can't write back to CPI or a GV stub.
-    if (MOs[3].isCPI() ||
-        (MOs[3].isGlobal() && isGVStub(MOs[3].getGlobal(), TM)))
-      return NULL;
     if (MI->getOpcode() == X86::MOV16r0)
       NewMI = MakeM0Inst(*this, X86::MOV16mi, MOs, MI);
     else if (MI->getOpcode() == X86::MOV32r0)