mirror of
https://github.com/RPCS3/llvm-mirror.git
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GlobalISel: cache pointer sizes in LLT
Otherwise everything that needs to work out what size they are has to keep a DataLayout handy, which is a bit silly and very annoying. llvm-svn: 281597
This commit is contained in:
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904baf9864
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@ -56,8 +56,8 @@ public:
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}
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/// Get a low-level pointer in the given address space (defaulting to 0).
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static LLT pointer(unsigned AddressSpace) {
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return LLT{Pointer, 1, AddressSpace};
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static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits) {
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return LLT{Pointer, AddressSpace, SizeInBits};
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}
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/// Get a low-level vector of some number of elements and element width.
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@ -79,16 +79,16 @@ public:
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return LLT{Unsized, 0, 0};
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}
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explicit LLT(TypeKind Kind, uint16_t NumElements, unsigned SizeOrAddrSpace)
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: SizeOrAddrSpace(SizeOrAddrSpace), NumElements(NumElements), Kind(Kind) {
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assert((Kind != Vector || NumElements > 1) &&
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explicit LLT(TypeKind Kind, uint16_t NumElements, unsigned SizeInBits)
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: SizeInBits(SizeInBits), ElementsOrAddrSpace(NumElements), Kind(Kind) {
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assert((Kind != Vector || ElementsOrAddrSpace > 1) &&
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"invalid number of vector elements");
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}
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explicit LLT() : SizeOrAddrSpace(0), NumElements(0), Kind(Invalid) {}
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explicit LLT() : SizeInBits(0), ElementsOrAddrSpace(0), Kind(Invalid) {}
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/// Construct a low-level type based on an LLVM type.
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explicit LLT(Type &Ty, const DataLayout *DL = nullptr);
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explicit LLT(Type &Ty, const DataLayout &DL);
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bool isValid() const { return Kind != Invalid; }
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@ -98,35 +98,39 @@ public:
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bool isVector() const { return Kind == Vector; }
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bool isSized() const { return Kind == Scalar || Kind == Vector; }
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bool isSized() const {
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return Kind == Scalar || Kind == Vector || Kind == Pointer;
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}
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/// Returns the number of elements in a vector LLT. Must only be called on
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/// vector types.
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uint16_t getNumElements() const {
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assert(isVector() && "cannot get number of elements on scalar/aggregate");
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return NumElements;
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return ElementsOrAddrSpace;
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}
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/// Returns the total size of the type. Must only be called on sized types.
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unsigned getSizeInBits() const {
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assert(isSized() && "attempt to get size of unsized type");
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return SizeOrAddrSpace * NumElements;
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if (isPointer() || isScalar())
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return SizeInBits;
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return SizeInBits * ElementsOrAddrSpace;
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}
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unsigned getScalarSizeInBits() const {
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assert(isSized() && "cannot get size of this type");
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return SizeOrAddrSpace;
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return SizeInBits;
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}
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unsigned getAddressSpace() const {
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assert(isPointer() && "cannot get address space of non-pointer type");
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return SizeOrAddrSpace;
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return ElementsOrAddrSpace;
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}
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/// Returns the vector's element type. Only valid for vector types.
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LLT getElementType() const {
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assert(isVector() && "cannot get element type of scalar/aggregate");
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return scalar(SizeOrAddrSpace);
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return scalar(SizeInBits);
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}
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/// Get a low-level type with half the size of the original, by halving the
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@ -135,7 +139,7 @@ public:
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LLT halfScalarSize() const {
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assert(isSized() && getScalarSizeInBits() > 1 &&
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getScalarSizeInBits() % 2 == 0 && "cannot half size of this type");
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return LLT{Kind, NumElements, SizeOrAddrSpace / 2};
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return LLT{Kind, ElementsOrAddrSpace, SizeInBits / 2};
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}
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/// Get a low-level type with twice the size of the original, by doubling the
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@ -143,7 +147,7 @@ public:
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/// `<2 x s32>` will become `<2 x s64>`.
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LLT doubleScalarSize() const {
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assert(isSized() && "cannot change size of this type");
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return LLT{Kind, NumElements, SizeOrAddrSpace * 2};
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return LLT{Kind, ElementsOrAddrSpace, SizeInBits * 2};
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}
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/// Get a low-level type with half the size of the original, by halving the
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@ -151,11 +155,13 @@ public:
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/// a vector type with an even number of elements. For example `<4 x s32>`
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/// will become `<2 x s32>`, `<2 x s32>` will become `s32`.
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LLT halfElements() const {
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assert(isVector() && NumElements % 2 == 0 && "cannot half odd vector");
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if (NumElements == 2)
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return scalar(SizeOrAddrSpace);
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assert(isVector() && ElementsOrAddrSpace % 2 == 0 &&
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"cannot half odd vector");
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if (ElementsOrAddrSpace == 2)
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return scalar(SizeInBits);
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return LLT{Vector, static_cast<uint16_t>(NumElements / 2), SizeOrAddrSpace};
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return LLT{Vector, static_cast<uint16_t>(ElementsOrAddrSpace / 2),
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SizeInBits};
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}
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/// Get a low-level type with twice the size of the original, by doubling the
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@ -163,22 +169,23 @@ public:
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/// a vector type. For example `<2 x s32>` will become `<4 x s32>`. Doubling
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/// the number of elements in sN produces <2 x sN>.
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LLT doubleElements() const {
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return LLT{Vector, static_cast<uint16_t>(NumElements * 2), SizeOrAddrSpace};
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return LLT{Vector, static_cast<uint16_t>(ElementsOrAddrSpace * 2),
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SizeInBits};
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}
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void print(raw_ostream &OS) const;
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bool operator==(const LLT &RHS) const {
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return Kind == RHS.Kind && SizeOrAddrSpace == RHS.SizeOrAddrSpace &&
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NumElements == RHS.NumElements;
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return Kind == RHS.Kind && SizeInBits == RHS.SizeInBits &&
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ElementsOrAddrSpace == RHS.ElementsOrAddrSpace;
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}
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bool operator!=(const LLT &RHS) const { return !(*this == RHS); }
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friend struct DenseMapInfo<LLT>;
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private:
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unsigned SizeOrAddrSpace;
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uint16_t NumElements;
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unsigned SizeInBits;
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uint16_t ElementsOrAddrSpace;
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TypeKind Kind;
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};
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@ -195,8 +202,8 @@ template<> struct DenseMapInfo<LLT> {
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return LLT{LLT::Invalid, 0, -2u};
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}
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static inline unsigned getHashValue(const LLT &Ty) {
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uint64_t Val = ((uint64_t)Ty.SizeOrAddrSpace << 32) |
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((uint64_t)Ty.NumElements << 16) | (uint64_t)Ty.Kind;
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uint64_t Val = ((uint64_t)Ty.SizeInBits << 32) |
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((uint64_t)Ty.ElementsOrAddrSpace << 16) | (uint64_t)Ty.Kind;
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return DenseMapInfo<uint64_t>::getHashValue(Val);
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}
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static bool isEqual(const LLT &LHS, const LLT &RHS) {
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@ -56,7 +56,7 @@ unsigned IRTranslator::getOrCreateVReg(const Value &Val) {
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// we need to concat together to produce the value.
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assert(Val.getType()->isSized() &&
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"Don't know how to create an empty vreg");
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unsigned VReg = MRI->createGenericVirtualRegister(LLT{*Val.getType(), DL});
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unsigned VReg = MRI->createGenericVirtualRegister(LLT{*Val.getType(), *DL});
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ValReg = VReg;
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if (auto CV = dyn_cast<Constant>(&Val)) {
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@ -176,7 +176,7 @@ bool IRTranslator::translateLoad(const User &U) {
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MachineFunction &MF = MIRBuilder.getMF();
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unsigned Res = getOrCreateVReg(LI);
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unsigned Addr = getOrCreateVReg(*LI.getPointerOperand());
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LLT VTy{*LI.getType(), DL}, PTy{*LI.getPointerOperand()->getType()};
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LLT VTy{*LI.getType(), *DL}, PTy{*LI.getPointerOperand()->getType(), *DL};
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MIRBuilder.buildLoad(
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Res, Addr,
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@ -197,8 +197,8 @@ bool IRTranslator::translateStore(const User &U) {
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MachineFunction &MF = MIRBuilder.getMF();
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unsigned Val = getOrCreateVReg(*SI.getValueOperand());
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unsigned Addr = getOrCreateVReg(*SI.getPointerOperand());
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LLT VTy{*SI.getValueOperand()->getType(), DL},
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PTy{*SI.getPointerOperand()->getType()};
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LLT VTy{*SI.getValueOperand()->getType(), *DL},
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PTy{*SI.getPointerOperand()->getType(), *DL};
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MIRBuilder.buildStore(
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Val, Addr,
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@ -270,7 +270,7 @@ bool IRTranslator::translateSelect(const User &U) {
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}
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bool IRTranslator::translateBitCast(const User &U) {
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if (LLT{*U.getOperand(0)->getType()} == LLT{*U.getType()}) {
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if (LLT{*U.getOperand(0)->getType(), *DL} == LLT{*U.getType(), *DL}) {
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unsigned &Reg = ValToVReg[&U];
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if (Reg)
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MIRBuilder.buildCopy(Reg, getOrCreateVReg(*U.getOperand(0)));
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@ -295,7 +295,7 @@ bool IRTranslator::translateGetElementPtr(const User &U) {
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Value &Op0 = *U.getOperand(0);
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unsigned BaseReg = getOrCreateVReg(Op0);
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LLT PtrTy(*Op0.getType());
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LLT PtrTy{*Op0.getType(), *DL};
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unsigned PtrSize = DL->getPointerSizeInBits(PtrTy.getAddressSpace());
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LLT OffsetTy = LLT::scalar(PtrSize);
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@ -372,7 +372,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI,
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case Intrinsic::smul_with_overflow: Op = TargetOpcode::G_SMULO; break;
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}
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LLT Ty{*CI.getOperand(0)->getType()};
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LLT Ty{*CI.getOperand(0)->getType(), *DL};
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LLT s1 = LLT::scalar(1);
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unsigned Width = Ty.getSizeInBits();
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unsigned Res = MRI->createGenericVirtualRegister(Ty);
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@ -18,32 +18,31 @@
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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LLT::LLT(Type &Ty, const DataLayout *DL) {
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LLT::LLT(Type &Ty, const DataLayout &DL) {
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if (auto VTy = dyn_cast<VectorType>(&Ty)) {
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SizeOrAddrSpace = VTy->getElementType()->getPrimitiveSizeInBits();
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NumElements = VTy->getNumElements();
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Kind = NumElements == 1 ? Scalar : Vector;
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SizeInBits = VTy->getElementType()->getPrimitiveSizeInBits();
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ElementsOrAddrSpace = VTy->getNumElements();
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Kind = ElementsOrAddrSpace == 1 ? Scalar : Vector;
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} else if (auto PTy = dyn_cast<PointerType>(&Ty)) {
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Kind = Pointer;
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SizeOrAddrSpace = PTy->getAddressSpace();
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NumElements = 1;
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SizeInBits = DL.getTypeSizeInBits(&Ty);
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ElementsOrAddrSpace = PTy->getAddressSpace();
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} else if (Ty.isSized()) {
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// Aggregates are no different from real scalars as far as GlobalISel is
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// concerned.
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Kind = Scalar;
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SizeOrAddrSpace =
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DL ? DL->getTypeSizeInBits(&Ty) : Ty.getPrimitiveSizeInBits();
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NumElements = 1;
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assert(SizeOrAddrSpace != 0 && "invalid zero-sized type");
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SizeInBits = DL.getTypeSizeInBits(&Ty);
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ElementsOrAddrSpace = 1;
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assert(SizeInBits != 0 && "invalid zero-sized type");
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} else {
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Kind = Unsized;
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SizeOrAddrSpace = NumElements = 0;
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SizeInBits = ElementsOrAddrSpace = 0;
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}
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}
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void LLT::print(raw_ostream &OS) const {
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if (isVector())
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OS << "<" << NumElements << " x s" << SizeOrAddrSpace << ">";
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OS << "<" << ElementsOrAddrSpace << " x s" << SizeInBits << ">";
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else if (isPointer())
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OS << "p" << getAddressSpace();
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else if (isSized())
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@ -1048,7 +1048,9 @@ bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
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lex();
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return false;
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} else if (Token.is(MIToken::PointerType)) {
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Ty = LLT::pointer(APSInt(Token.range().drop_front()).getZExtValue());
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const DataLayout &DL = MF.getFunction()->getParent()->getDataLayout();
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unsigned AS = APSInt(Token.range().drop_front()).getZExtValue();
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Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
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lex();
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return false;
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}
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@ -232,9 +232,9 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
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case TargetOpcode::G_FRAME_INDEX: {
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// allocas and G_FRAME_INDEX are only supported in addrspace(0).
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if (Ty != LLT::pointer(0)) {
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if (Ty != LLT::pointer(0, 64)) {
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DEBUG(dbgs() << "G_FRAME_INDEX pointer has type: " << Ty
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<< ", expected: " << LLT::pointer(0) << '\n');
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<< ", expected: " << LLT::pointer(0, 64) << '\n');
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return false;
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}
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@ -251,9 +251,9 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
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LLT MemTy = Ty;
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LLT PtrTy = MRI.getType(I.getOperand(1).getReg());
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if (PtrTy != LLT::pointer(0)) {
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if (PtrTy != LLT::pointer(0, 64)) {
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DEBUG(dbgs() << "Load/Store pointer has type: " << PtrTy
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<< ", expected: " << LLT::pointer(0) << '\n');
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<< ", expected: " << LLT::pointer(0, 64) << '\n');
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return false;
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}
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@ -26,7 +26,7 @@ using namespace llvm;
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AArch64MachineLegalizer::AArch64MachineLegalizer() {
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using namespace TargetOpcode;
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const LLT p0 = LLT::pointer(0);
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const LLT p0 = LLT::pointer(0, 64);
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const LLT s1 = LLT::scalar(1);
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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@ -109,18 +109,19 @@ TEST(MachineLegalizerTest, VectorRISC) {
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TEST(MachineLegalizerTest, MultipleTypes) {
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using namespace TargetOpcode;
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MachineLegalizer L;
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LLT p0 = LLT::pointer(0, 64);
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LLT s32 = LLT::scalar(32);
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LLT s64 = LLT::scalar(64);
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// Typical RISCy set of operations based on AArch64.
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L.setAction({G_PTRTOINT, 0, LLT::scalar(64)}, Legal);
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L.setAction({G_PTRTOINT, 1, LLT::pointer(0)}, Legal);
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L.setAction({G_PTRTOINT, 0, s64}, Legal);
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L.setAction({G_PTRTOINT, 1, p0}, Legal);
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L.setAction({G_PTRTOINT, 0, LLT::scalar(32)}, WidenScalar);
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L.setAction({G_PTRTOINT, 0, s32}, WidenScalar);
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L.computeTables();
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// Check we infer the correct types and actually do what we're told.
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ASSERT_EQ(L.getAction({G_PTRTOINT, 0, LLT::scalar(64)}),
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std::make_pair(Legal, LLT::scalar(64)));
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ASSERT_EQ(L.getAction({G_PTRTOINT, 1, LLT::pointer(0)}),
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std::make_pair(Legal, LLT::pointer(0)));
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ASSERT_EQ(L.getAction({G_PTRTOINT, 0, s64}), std::make_pair(Legal, s64));
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ASSERT_EQ(L.getAction({G_PTRTOINT, 1, p0}), std::make_pair(Legal, p0));
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}
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}
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@ -8,6 +8,7 @@
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LowLevelType.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Type.h"
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@ -31,6 +32,7 @@ namespace {
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TEST(LowLevelTypeTest, Scalar) {
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LLVMContext C;
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DataLayout DL("");
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for (unsigned S : {1U, 17U, 32U, 64U, 0xfffffU}) {
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const LLT Ty = LLT::scalar(S);
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@ -67,12 +69,13 @@ TEST(LowLevelTypeTest, Scalar) {
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// Test Type->LLT conversion.
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Type *IRTy = IntegerType::get(C, S);
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EXPECT_EQ(Ty, LLT(*IRTy));
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EXPECT_EQ(Ty, LLT(*IRTy, DL));
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}
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}
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TEST(LowLevelTypeTest, Vector) {
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LLVMContext C;
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DataLayout DL("");
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for (unsigned S : {1U, 17U, 32U, 64U, 0xfffU}) {
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for (uint16_t Elts : {2U, 3U, 4U, 32U, 0xffU}) {
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@ -160,22 +163,23 @@ TEST(LowLevelTypeTest, Vector) {
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// Test Type->LLT conversion.
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Type *IRSTy = IntegerType::get(C, S);
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Type *IRTy = VectorType::get(IRSTy, Elts);
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EXPECT_EQ(VTy, LLT(*IRTy));
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EXPECT_EQ(VTy, LLT(*IRTy, DL));
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}
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}
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}
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TEST(LowLevelTypeTest, Pointer) {
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LLVMContext C;
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DataLayout DL("");
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for (unsigned AS : {0U, 1U, 127U, 0xffffU}) {
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const LLT Ty = LLT::pointer(AS);
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const LLT Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
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// Test kind.
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ASSERT_TRUE(Ty.isValid());
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ASSERT_TRUE(Ty.isPointer());
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ASSERT_TRUE(Ty.isSized());
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ASSERT_FALSE(Ty.isSized());
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ASSERT_FALSE(Ty.isScalar());
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ASSERT_FALSE(Ty.isVector());
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@ -188,7 +192,7 @@ TEST(LowLevelTypeTest, Pointer) {
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// Test Type->LLT conversion.
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Type *IRTy = PointerType::get(IntegerType::get(C, 8), AS);
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EXPECT_EQ(Ty, LLT(*IRTy));
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EXPECT_EQ(Ty, LLT(*IRTy, DL));
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}
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}
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@ -204,6 +208,7 @@ TEST(LowLevelTypeTest, Invalid) {
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TEST(LowLevelTypeTest, Unsized) {
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LLVMContext C;
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DataLayout DL("");
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const LLT Ty = LLT::unsized();
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@ -214,6 +219,6 @@ TEST(LowLevelTypeTest, Unsized) {
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ASSERT_FALSE(Ty.isVector());
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Type *IRTy = Type::getLabelTy(C);
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EXPECT_EQ(Ty, LLT(*IRTy));
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EXPECT_EQ(Ty, LLT(*IRTy, DL));
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}
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}
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