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Move FP_REG_KILL closer to the actual branch instruction.
llvm-svn: 10563
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41bd8284e3
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@ -883,11 +883,12 @@ static inline BasicBlock *getBlockAfter(BasicBlock *BB) {
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///
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void ISel::visitBranchInst(BranchInst &BI) {
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BasicBlock *NextBB = getBlockAfter(BI.getParent()); // BB after current one
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BuildMI(BB, X86::FP_REG_KILL, 0);
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if (!BI.isConditional()) { // Unconditional branch?
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if (BI.getSuccessor(0) != NextBB)
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if (BI.getSuccessor(0) != NextBB) {
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BuildMI(BB, X86::FP_REG_KILL, 0);
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BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
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}
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return;
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}
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@ -898,6 +899,7 @@ void ISel::visitBranchInst(BranchInst &BI) {
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// computed some other way...
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unsigned condReg = getReg(BI.getCondition());
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BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0);
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BuildMI(BB, X86::FP_REG_KILL, 0);
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if (BI.getSuccessor(1) == NextBB) {
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if (BI.getSuccessor(0) != NextBB)
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BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0));
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@ -936,6 +938,7 @@ void ISel::visitBranchInst(BranchInst &BI) {
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X86::JS, X86::JNS },
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};
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BuildMI(BB, X86::FP_REG_KILL, 0);
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if (BI.getSuccessor(0) != NextBB) {
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BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0));
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if (BI.getSuccessor(1) != NextBB)
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