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[SystemZ] Improve foldMemoryOperandImpl()
A spilled load of an immediate can use MVHI/MVGHI instead. A compare of a spilled register against an immediate can use CHSI/CGHSI. A logical compare can use CLFHSI/CLGHSI. Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D76055
This commit is contained in:
Jonas Paulsson
parent
f77570d407
commit
8975f60913
@ -1078,6 +1078,32 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
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return BuiltMI;
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}
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unsigned MemImmOpc = 0;
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switch (Opcode) {
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case SystemZ::LHIMux:
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case SystemZ::LHI: MemImmOpc = SystemZ::MVHI; break;
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case SystemZ::LGHI: MemImmOpc = SystemZ::MVGHI; break;
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case SystemZ::CHIMux:
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case SystemZ::CHI: MemImmOpc = SystemZ::CHSI; break;
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case SystemZ::CGHI: MemImmOpc = SystemZ::CGHSI; break;
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case SystemZ::CLFIMux:
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case SystemZ::CLFI:
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if (isUInt<16>(MI.getOperand(1).getImm()))
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MemImmOpc = SystemZ::CLFHSI;
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break;
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case SystemZ::CLGFI:
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if (isUInt<16>(MI.getOperand(1).getImm()))
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MemImmOpc = SystemZ::CLGHSI;
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break;
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default: break;
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}
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if (MemImmOpc)
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return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
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get(MemImmOpc))
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.addFrameIndex(FrameIndex)
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.addImm(0)
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.addImm(MI.getOperand(1).getImm());
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if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) {
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bool Op0IsGPR = (Opcode == SystemZ::LGDR);
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bool Op1IsGPR = (Opcode == SystemZ::LDGR);
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55
test/CodeGen/SystemZ/foldmemop-imm-01.ll
Normal file
55
test/CodeGen/SystemZ/foldmemop-imm-01.ll
Normal file
@ -0,0 +1,55 @@
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; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 -mcpu=z14 | FileCheck %s
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;
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; Test folding of spilled immediate loads and compares.
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define i32 @fun0(i32 *%src, i32 %arg) nounwind {
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; CHECK-LABEL: fun0:
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; CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
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; CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
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; CHECK-LABEL: .LBB0_2:
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; CHECK: chsi 164(%r15), 2 # 4-byte Folded Reload
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entry:
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%cmp = icmp eq i32 %arg, 0
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br i1 %cmp, label %cond, label %exit
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cond:
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%val0 = load i32, i32 *%src
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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br label %exit
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exit:
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%tmp0 = phi i32 [0, %entry], [%val0, %cond]
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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%cmp0 = icmp ne i32 %tmp0, 2
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%zxt0 = zext i1 %cmp0 to i32
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%and0 = and i32 %arg, %zxt0
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ret i32 %and0
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}
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define i64 @fun1(i64 *%src, i64 %arg) nounwind {
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; CHECK-LABEL: fun1:
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; CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
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; CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
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; CHECK-LABEL: .LBB1_2:
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; CHECK: cghsi 168(%r15), 2 # 8-byte Folded Reload
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entry:
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%cmp = icmp eq i64 %arg, 0
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br i1 %cmp, label %cond, label %exit
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cond:
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%val0 = load i64, i64 *%src
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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br label %exit
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exit:
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%tmp0 = phi i64 [0, %entry], [%val0, %cond]
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
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%cmp0 = icmp ne i64 %tmp0, 2
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%zxt0 = zext i1 %cmp0 to i64
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%and0 = and i64 %arg, %zxt0
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ret i64 %and0
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}
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233
test/CodeGen/SystemZ/foldmemop-imm-02.mir
Normal file
233
test/CodeGen/SystemZ/foldmemop-imm-02.mir
Normal file
@ -0,0 +1,233 @@
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# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z14 -start-before=greedy %s -o - \
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# RUN: | FileCheck %s
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#
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# Test folding of a memory operand into logical compare with an immediate.
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--- |
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define i32 @fun0(i32* %src, i32 %arg) { ret i32 0 }
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define i64 @fun1(i64* %src, i64 %arg) { ret i64 0 }
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define i32 @fun2(i32* %src, i32 %arg) { ret i32 0 }
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define i64 @fun3(i64* %src, i64 %arg) { ret i64 0 }
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...
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# CHECK-LABEL: fun0:
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# CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
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# CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
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# CHECK-LABEL: .LBB0_2:
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# CHECK: clfhsi 164(%r15), 2 # 4-byte Folded Reload
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---
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name: fun0
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: grx32bit }
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- { id: 1, class: grx32bit }
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- { id: 2, class: addr64bit }
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- { id: 3, class: gr32bit }
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- { id: 4, class: grx32bit }
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- { id: 5, class: grx32bit }
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- { id: 6, class: gr32bit }
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- { id: 7, class: gr32bit }
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- { id: 8, class: grx32bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%2' }
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- { reg: '$r3l', virtual-reg: '%3' }
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frameInfo:
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maxAlignment: 1
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hasOpaqueSPAdjustment: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r2d, $r3l
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%3:gr32bit = COPY $r3l
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%2:addr64bit = COPY $r2d
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%6:gr32bit = LHIMux 0
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CHIMux %3, 0, implicit-def $cc
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%8:grx32bit = LHIMux 0
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BRC 14, 6, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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%8:grx32bit = LMux %2, 0, $noreg :: (load 4 from %ir.src)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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bb.2:
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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CLFIMux %8, 2, implicit-def $cc
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%6:gr32bit = LOCHIMux %6, 1, 14, 6, implicit killed $cc
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%7:gr32bit = NRK %3, %6, implicit-def dead $cc
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$r2l = COPY %7
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Return implicit $r2l
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...
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# CHECK-LABEL: fun1:
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# CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
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# CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
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# CHECK-LABEL: .LBB1_2:
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# CHECK: clghsi 168(%r15), 2 # 8-byte Folded Reload
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---
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name: fun1
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64bit }
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- { id: 1, class: gr64bit }
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- { id: 2, class: addr64bit }
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- { id: 3, class: gr64bit }
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- { id: 4, class: gr64bit }
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- { id: 5, class: gr64bit }
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- { id: 6, class: gr64bit }
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- { id: 7, class: gr64bit }
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- { id: 8, class: gr64bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%2' }
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- { reg: '$r3d', virtual-reg: '%3' }
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frameInfo:
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maxAlignment: 1
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hasOpaqueSPAdjustment: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r2d, $r3d
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%3:gr64bit = COPY $r3d
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%2:addr64bit = COPY $r2d
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%6:gr64bit = LGHI 0
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CGHI %3, 0, implicit-def $cc
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%8:gr64bit = LGHI 0
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BRC 14, 6, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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%8:gr64bit = LG %2, 0, $noreg :: (load 8 from %ir.src)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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bb.2:
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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CLGFI %8, 2, implicit-def $cc
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%6:gr64bit = LOCGHI %6, 1, 14, 6, implicit killed $cc
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%7:gr64bit = NGRK %3, %6, implicit-def dead $cc
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$r2d = COPY %7
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Return implicit $r2d
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...
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# 17-bit immediate can not be folded
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# CHECK-LABEL: fun2:
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# CHECK: mvhi 164(%r15), 0 # 4-byte Folded Spill
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# CHECK: mvc 164(4,%r15), 0(%r2) # 4-byte Folded Spill
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# CHECK-LABEL: .LBB2_2:
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# CHECK: l %r0, 164(%r15) # 4-byte Folded Reload
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# CHECK: clfi %r0, 65536
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---
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name: fun2
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: grx32bit }
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- { id: 1, class: grx32bit }
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- { id: 2, class: addr64bit }
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- { id: 3, class: gr32bit }
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- { id: 4, class: grx32bit }
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- { id: 5, class: grx32bit }
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- { id: 6, class: gr32bit }
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- { id: 7, class: gr32bit }
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- { id: 8, class: grx32bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%2' }
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- { reg: '$r3l', virtual-reg: '%3' }
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frameInfo:
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maxAlignment: 1
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hasOpaqueSPAdjustment: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r2d, $r3l
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%3:gr32bit = COPY $r3l
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%2:addr64bit = COPY $r2d
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%6:gr32bit = LHIMux 0
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CHIMux %3, 0, implicit-def $cc
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%8:grx32bit = LHIMux 0
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BRC 14, 6, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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%8:grx32bit = LMux %2, 0, $noreg :: (load 4 from %ir.src)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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bb.2:
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
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CLFIMux %8, 65536, implicit-def $cc
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%6:gr32bit = LOCHIMux %6, 1, 14, 6, implicit killed $cc
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%7:gr32bit = NRK %3, %6, implicit-def dead $cc
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$r2l = COPY %7
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Return implicit $r2l
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...
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# 17-bit immediate can not be folded
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# CHECK-LABEL: fun3:
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# CHECK: mvghi 168(%r15), 0 # 8-byte Folded Spill
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# CHECK: mvc 168(8,%r15), 0(%r2) # 8-byte Folded Spill
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# CHECK-LABEL: .LBB3_2:
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# CHECK: lg %r0, 168(%r15) # 8-byte Folded Reload
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# CHECK: clgfi %r0, 65536
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---
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name: fun3
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64bit }
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- { id: 1, class: gr64bit }
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- { id: 2, class: addr64bit }
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- { id: 3, class: gr64bit }
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- { id: 4, class: gr64bit }
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- { id: 5, class: gr64bit }
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- { id: 6, class: gr64bit }
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- { id: 7, class: gr64bit }
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- { id: 8, class: gr64bit }
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liveins:
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- { reg: '$r2d', virtual-reg: '%2' }
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- { reg: '$r3d', virtual-reg: '%3' }
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frameInfo:
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maxAlignment: 1
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hasOpaqueSPAdjustment: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r2d, $r3d
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%3:gr64bit = COPY $r3d
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%2:addr64bit = COPY $r2d
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%6:gr64bit = LGHI 0
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CGHI %3, 0, implicit-def $cc
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%8:gr64bit = LGHI 0
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BRC 14, 6, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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%8:gr64bit = LG %2, 0, $noreg :: (load 8 from %ir.src)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
|
||||
|
||||
bb.2:
|
||||
INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0d, 12, implicit-def dead early-clobber $r1d, 12, implicit-def dead early-clobber $r2d, 12, implicit-def dead early-clobber $r3d, 12, implicit-def dead early-clobber $r4d, 12, implicit-def dead early-clobber $r5d, 12, implicit-def dead early-clobber $r6d, 12, implicit-def dead early-clobber $r7d, 12, implicit-def dead early-clobber $r8d, 12, implicit-def dead early-clobber $r9d, 12, implicit-def dead early-clobber $r10d, 12, implicit-def dead early-clobber $r11d, 12, implicit-def dead early-clobber $r12d, 12, implicit-def dead early-clobber $r13d, 12, implicit-def dead early-clobber $r14d, 12, implicit-def early-clobber $r15d
|
||||
CLGFI %8, 65536, implicit-def $cc
|
||||
%6:gr64bit = LOCGHI %6, 1, 14, 6, implicit killed $cc
|
||||
%7:gr64bit = NGRK %3, %6, implicit-def dead $cc
|
||||
$r2d = COPY %7
|
||||
Return implicit $r2d
|
||||
|
||||
...
|
||||
Loading…
Reference in New Issue
Block a user