diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index ff82ec43445..53c36f3a556 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -17,9 +17,8 @@ // // Type profiles. -def SDT_ARMCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; -def SDT_ARMCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>, - SDTCisVT<1, i32> ]>; +def SDT_ARMCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; +def SDT_ARMCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>; def SDT_ARMSaveCallPC : SDTypeProfile<0, 1, []>; @@ -47,9 +46,9 @@ def SDT_ARMThreadPointer : SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; def ARMWrapper : SDNode<"ARMISD::Wrapper", SDTIntUnaryOp>; def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>; -def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq_start, +def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeqStart, [SDNPHasChain, SDNPOutFlag]>; -def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq_end, +def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall, diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index 1ab6d4c6697..88bcc9dff13 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -30,13 +30,13 @@ def retflag : SDNode<"AlphaISD::RET_FLAG", SDTRet, [SDNPHasChain, SDNPOptInFlag]>; // These are target-independent nodes, but have target-specific formats. -def SDT_AlphaCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>; -def SDT_AlphaCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i64>, - SDTCisVT<1, i64> ]>; +def SDT_AlphaCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64> ]>; +def SDT_AlphaCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i64>, + SDTCisVT<1, i64> ]>; -def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeq_start, +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeqStart, [SDNPHasChain, SDNPOutFlag]>; -def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeq_end, +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; //******************** diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 1252912a1df..d74ca540920 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -34,13 +34,13 @@ def MipsRet : SDNode<"MipsISD::Ret", SDT_MipsRet, [SDNPHasChain, SDNPOptInFlag]>; // These are target-independent nodes, but have target-specific formats. -def SDT_MipsCallSeq_start : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; -def SDT_MipsCallSeq_end : SDTypeProfile<0, 2, [SDTCisVT<0, i32>, - SDTCisVT<1, i32>]>; +def SDT_MipsCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>; +def SDT_MipsCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, + SDTCisVT<1, i32>]>; -def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeq_start, +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeqStart, [SDNPHasChain, SDNPOutFlag]>; -def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeq_end, +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; //===----------------------------------------------------------------------===// diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 42d0f659ea8..e1ded363945 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -23,9 +23,9 @@ def SDT_PPCstfiwx : SDTypeProfile<0, 2, [ // stfiwx def SDT_PPCShiftOp : SDTypeProfile<1, 2, [ // PPCshl, PPCsra, PPCsrl SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i32> ]>; -def SDT_PPCCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; -def SDT_PPCCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>, - SDTCisVT<1, i32> ]>; +def SDT_PPCCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; +def SDT_PPCCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, + SDTCisVT<1, i32> ]>; def SDT_PPCvperm : SDTypeProfile<1, 3, [ SDTCisVT<3, v16i8>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2> ]>; @@ -91,9 +91,9 @@ def PPCextsw_32 : SDNode<"PPCISD::EXTSW_32" , SDTIntUnaryOp>; def PPCstd_32 : SDNode<"PPCISD::STD_32" , SDTStore, [SDNPHasChain]>; // These are target-independent nodes, but have target-specific formats. -def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_PPCCallSeq_start, +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_PPCCallSeqStart, [SDNPHasChain, SDNPOutFlag]>; -def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_PPCCallSeq_end, +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_PPCCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def SDT_PPCCall : SDTypeProfile<0, -1, [SDTCisInt<0>]>; diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 101ca42c9ab..354e3600591 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -114,13 +114,13 @@ def SPselecticc : SDNode<"SPISD::SELECT_ICC", SDTSPselectcc, [SDNPInFlag]>; def SPselectfcc : SDNode<"SPISD::SELECT_FCC", SDTSPselectcc, [SDNPInFlag]>; // These are target-independent nodes, but have target-specific formats. -def SDT_SPCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; -def SDT_SPCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>, - SDTCisVT<1, i32> ]>; +def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; +def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, + SDTCisVT<1, i32> ]>; -def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_SPCallSeq_start, +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_SPCallSeqStart, [SDNPHasChain, SDNPOutFlag]>; -def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_SPCallSeq_end, +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_SPCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def SDT_SPCall : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td index 15c31696a1e..8a881b93a8d 100644 --- a/lib/Target/TargetSelectionDAG.td +++ b/lib/Target/TargetSelectionDAG.td @@ -172,6 +172,11 @@ def SDTVecShuffle : SDTypeProfile<1, 3, [ SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0> ]>; +class SDCallSeqStart constraints> : + SDTypeProfile<0, 1, constraints>; +class SDCallSeqEnd constraints> : + SDTypeProfile<0, 2, constraints>; + //===----------------------------------------------------------------------===// // Selection DAG Node Properties. // diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index fb9fefa2f19..a92ff50f19e 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -37,9 +37,9 @@ def SDTX86SetCC : SDTypeProfile<1, 2, def SDTX86Ret : SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>; -def SDT_X86CallSeqStart : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; -def SDT_X86CallSeqEnd : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>, - SDTCisVT<1, i32> ]>; +def SDT_X86CallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; +def SDT_X86CallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, + SDTCisVT<1, i32> ]>; def SDT_X86Call : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>;