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[X86][XOP] Fixed VPPERM permute op decoding (PR27472).

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Fixed issue with VPPERM target shuffle mask decoding that was incorrectly masking off the 3-bit permute op with a 2-bit mask.

llvm-svn: 267346
This commit is contained in:
Simon Pilgrim 2016-04-24 15:05:04 +00:00
parent e1c776018e
commit 9549c9fa45
2 changed files with 2 additions and 2 deletions
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2
lib/Target/X86/Utils/X86ShuffleDecode.cpp
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@ -367,7 +367,7 @@ void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask,
continue;
}
uint64_t PermuteOp = (M >> 5) & 0x3;
uint64_t PermuteOp = (M >> 5) & 0x7;
if (PermuteOp == 4) {
ShuffleMask.push_back(SM_SentinelZero);
continue;

2
test/CodeGen/X86/vector-shuffle-combining-xop.ll
View File

@ -23,7 +23,7 @@ define <16 x i8> @combine_vpperm_identity(<16 x i8> %a0, <16 x i8> %a1) {
define <16 x i8> @combine_vpperm_zero(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: combine_vpperm_zero:
; CHECK: # BB#0:
; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: retq
%res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
%res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> <i8 0, i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)