From 957010e4ff035bc5b2b667b2f7dd7a27fe8a2bf8 Mon Sep 17 00:00:00 2001
From: Xing GUO <higuoxing@gmail.com>
Date: Sat, 2 Mar 2019 08:03:59 +0000
Subject: [PATCH] [Codegen] fix typos in test case

llvm-svn: 355264
---
 test/CodeGen/AArch64/arm64-neon-2velem.ll    | 6 +++---
 test/CodeGen/AMDGPU/rewrite-out-arguments.ll | 2 +-
 test/CodeGen/NVPTX/param-load-store.ll       | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/CodeGen/AArch64/arm64-neon-2velem.ll b/test/CodeGen/AArch64/arm64-neon-2velem.ll
index c2412371d14..60d9bb5fd36 100644
--- a/test/CodeGen/AArch64/arm64-neon-2velem.ll
+++ b/test/CodeGen/AArch64/arm64-neon-2velem.ll
@@ -559,9 +559,9 @@ entry:
 }
 
 define double @test_vfmsd_lane_f64_0(double %a, double %b, <1 x double> %v) {
-; CHCK-LABEL: test_vfmsd_lane_f64_0
-; CHCK: fmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
-; CHCK-NEXT: ret
+; CHECK-LABEL: test_vfmsd_lane_f64_0
+; CHECK: fmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
+; CHECK-NEXT: ret
 entry:
   %tmp0 = fsub <1 x double> <double -0.000000e+00>, %v
   %tmp1 = extractelement <1 x double> %tmp0, i32 0
diff --git a/test/CodeGen/AMDGPU/rewrite-out-arguments.ll b/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
index 11760f4766e..f79bbfb57d4 100644
--- a/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
+++ b/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
@@ -282,7 +282,7 @@ ret1:
 ; CHECK-NEXT: %2 = call %void_one_out_arg_v2i32_1_use @void_one_out_arg_v2i32_1_use.body(<2 x i32>* undef)
 ; CHECK-NEXT: %3 = extractvalue %void_one_out_arg_v2i32_1_use %2, 0
 ; CHECK-NEXT: store <2 x i32> %3, <2 x i32>* %0, align 8
-; CHCEK-NEXT: ret void
+; CHECK-NEXT: ret void
 define void @void_one_out_arg_v2i32_1_use(<2 x i32>* %val) #0 {
   store <2 x i32> <i32 17, i32 9>, <2 x i32>* %val
   ret void
diff --git a/test/CodeGen/NVPTX/param-load-store.ll b/test/CodeGen/NVPTX/param-load-store.ll
index d2c5495e160..bcc76c3fbbd 100644
--- a/test/CodeGen/NVPTX/param-load-store.ll
+++ b/test/CodeGen/NVPTX/param-load-store.ll
@@ -516,7 +516,7 @@ define <3 x i32> @test_v3i32(<3 x i32> %a) {
 ; CHECK-NEXT: test_v4i32,
 ; CHECK:      ld.param.v4.b32  {[[RE0:%r[0-9]+]], [[RE1:%r[0-9]+]], [[RE2:%r[0-9]+]], [[RE3:%r[0-9]+]]}, [retval0+0];
 ; CHECK:      st.param.v4.b32  [func_retval0+0], {[[RE0]], [[RE1]], [[RE2]], [[RE3]]}
-; CHCK-NEXT: ret;
+; CHECK-NEXT: ret;
 define <4 x i32> @test_v4i32(<4 x i32> %a) {
        %r = tail call <4 x i32> @test_v4i32(<4 x i32> %a);
        ret <4 x i32> %r;