diff --git a/lib/Bitcode/Writer/ValueEnumerator.cpp b/lib/Bitcode/Writer/ValueEnumerator.cpp
index 273ea06c641..f0f9f7430c5 100644
--- a/lib/Bitcode/Writer/ValueEnumerator.cpp
+++ b/lib/Bitcode/Writer/ValueEnumerator.cpp
@@ -106,6 +106,9 @@ static void predictValueUseListOrderImpl(const Value *V, const Function *F,
[&OM, ID](const Entry &L, const Entry &R) {
const Use *LU = L.first;
const Use *RU = R.first;
+ if (LU == RU)
+ return false;
+
auto LID = OM.lookup(LU->getUser()).first;
auto RID = OM.lookup(RU->getUser()).first;
// If ID is 4, then expect: 7 6 5 1 2 3.
diff --git a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index e704627e361..e1e2d7dc544 100644
--- a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,6 +1,7 @@
; This test ensures that we get a bitcast constant expression in and out,
; not a sitofp constant expression.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: bitcast (
@G = external global i32
diff --git a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index 415f88e1637..a321ce21311 100644
--- a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR4373
@foo = weak global { i32 } zeroinitializer
diff --git a/test/Bitcode/aggregateInstructions.3.2.ll b/test/Bitcode/aggregateInstructions.3.2.ll
index 8d9378c363f..4d35be08bd1 100644
--- a/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands
diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index 10b9284e981..fba518fe7f7 100644
--- a/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Tests vclz and vcnt
define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
diff --git a/test/Bitcode/atomic.ll b/test/Bitcode/atomic.ll
index d41c9e7acf7..448219a59cb 100644
--- a/test/Bitcode/atomic.ll
+++ b/test/Bitcode/atomic.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
diff --git a/test/Bitcode/attributes-3.3.ll b/test/Bitcode/attributes-3.3.ll
index cd70ba1a749..7b44938a3e8 100644
--- a/test/Bitcode/attributes-3.3.ll
+++ b/test/Bitcode/attributes-3.3.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
; The test checks that LLVM does not silently misread attributes of
diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll
index 9a429f6e21f..0fe66f5ad82 100644
--- a/test/Bitcode/attributes.ll
+++ b/test/Bitcode/attributes.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR12696
define void @f1(i8 zeroext)
diff --git a/test/Bitcode/binaryFloatInstructions.3.2.ll b/test/Bitcode/binaryFloatInstructions.3.2.ll
index ef0b03dbe54..a0010e03834 100644
--- a/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary float instructions from
diff --git a/test/Bitcode/binaryIntInstructions.3.2.ll b/test/Bitcode/binaryIntInstructions.3.2.ll
index 2856c13f890..bcf3d5882e0 100644
--- a/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary integer instructions from
diff --git a/test/Bitcode/bitwiseInstructions.3.2.ll b/test/Bitcode/bitwiseInstructions.3.2.ll
index a8ca963f62a..780f0447a52 100644
--- a/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread bitwise instructions from
diff --git a/test/Bitcode/calling-conventions.3.2.ll b/test/Bitcode/calling-conventions.3.2.ll
index aca9efd0892..6a497dc8d5a 100644
--- a/test/Bitcode/calling-conventions.3.2.ll
+++ b/test/Bitcode/calling-conventions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread calling conventions of
diff --git a/test/Bitcode/case-ranges-3.3.ll b/test/Bitcode/case-ranges-3.3.ll
index 6e1d0a69a59..1198f2bb2cb 100644
--- a/test/Bitcode/case-ranges-3.3.ll
+++ b/test/Bitcode/case-ranges-3.3.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
; release of LLVM. This tests that the bitcode for switches from that release
diff --git a/test/Bitcode/cmpxchg-upgrade.ll b/test/Bitcode/cmpxchg-upgrade.ll
index eae62b07454..94f0eef455e 100644
--- a/test/Bitcode/cmpxchg-upgrade.ll
+++ b/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.
diff --git a/test/Bitcode/conversionInstructions.3.2.ll b/test/Bitcode/conversionInstructions.3.2.ll
index 245388500a0..9f8204821d4 100644
--- a/test/Bitcode/conversionInstructions.3.2.ll
+++ b/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread conversion instructions from
diff --git a/test/Bitcode/drop-debug-info.ll b/test/Bitcode/drop-debug-info.ll
index 5123018577e..b3073e0d6c8 100644
--- a/test/Bitcode/drop-debug-info.ll
+++ b/test/Bitcode/drop-debug-info.ll
@@ -1,5 +1,6 @@
; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
; RUN: llvm-dis < %t.bc | FileCheck %s
+; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
define i32 @main() {
entry:
diff --git a/test/Bitcode/extractelement.ll b/test/Bitcode/extractelement.ll
index 8999c656fce..29f5b029200 100644
--- a/test/Bitcode/extractelement.ll
+++ b/test/Bitcode/extractelement.ll
@@ -1,4 +1,5 @@
; RUN: opt < %s -constprop | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR3465
define double @test() {
diff --git a/test/Bitcode/flags.ll b/test/Bitcode/flags.ll
index 7b0c5b53889..3760a44bd6f 100644
--- a/test/Bitcode/flags.ll
+++ b/test/Bitcode/flags.ll
@@ -1,6 +1,7 @@
; RUN: llvm-as < %s | llvm-dis > %t0
; RUN: opt -S < %s > %t1
; RUN: diff %t0 %t1
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR6140
; Make sure the flags are serialized/deserialized properly for both
diff --git a/test/Bitcode/function-encoding-rel-operands.ll b/test/Bitcode/function-encoding-rel-operands.ll
index aedb0c32676..cc2f6aef5e5 100644
--- a/test/Bitcode/function-encoding-rel-operands.ll
+++ b/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,6 +1,7 @@
; Basic sanity test to check that instruction operands are encoded with
; relative IDs.
; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: FUNCTION_BLOCK
; CHECK: INST_BINOP {{.*}}op0=1 op1=1
diff --git a/test/Bitcode/global-variables.3.2.ll b/test/Bitcode/global-variables.3.2.ll
index 549d025549b..4a856f199e5 100644
--- a/test/Bitcode/global-variables.3.2.ll
+++ b/test/Bitcode/global-variables.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread global variables attributes of
diff --git a/test/Bitcode/inalloca.ll b/test/Bitcode/inalloca.ll
index bad87a9b03f..445b4a282bf 100644
--- a/test/Bitcode/inalloca.ll
+++ b/test/Bitcode/inalloca.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; inalloca should roundtrip.
diff --git a/test/Bitcode/linkage-types-3.2.ll b/test/Bitcode/linkage-types-3.2.ll
index fd070efbd44..01b195f6c51 100644
--- a/test/Bitcode/linkage-types-3.2.ll
+++ b/test/Bitcode/linkage-types-3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
; The test checks that LLVM does not silently misread linkage types of
diff --git a/test/Bitcode/memInstructions.3.2.ll b/test/Bitcode/memInstructions.3.2.ll
index a84f8c3d84e..a8073225a69 100644
--- a/test/Bitcode/memInstructions.3.2.ll
+++ b/test/Bitcode/memInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread memory related instructions of
diff --git a/test/Bitcode/metadata.ll b/test/Bitcode/metadata.ll
index fc8a622252b..a3550bcacec 100644
--- a/test/Bitcode/metadata.ll
+++ b/test/Bitcode/metadata.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
!llvm.foo = !{!0}
!0 = metadata !{i32 42}
diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll
index 735cc9c1cc4..c0ded8b622c 100644
--- a/test/Bitcode/ptest-new.ll
+++ b/test/Bitcode/ptest-new.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<2 x i64> %bar) nounwind {
entry:
diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll
index fbe962fae51..c6c160539c2 100644
--- a/test/Bitcode/ptest-old.ll
+++ b/test/Bitcode/ptest-old.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<4 x float> %bar) nounwind {
entry:
diff --git a/test/Bitcode/select.ll b/test/Bitcode/select.ll
index 08a3061394d..3da53857870 100644
--- a/test/Bitcode/select.ll
+++ b/test/Bitcode/select.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define <2 x i32> @main() {
ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)
diff --git a/test/Bitcode/shuffle.ll b/test/Bitcode/shuffle.ll
index 1495d8eebf9..65bde6765c2 100644
--- a/test/Bitcode/shuffle.ll
+++ b/test/Bitcode/shuffle.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; <rdar://problem/8622574>
; tests the bitcodereader can handle the case where the reader will initially
diff --git a/test/Bitcode/tailcall.ll b/test/Bitcode/tailcall.ll
index 765b47054ca..ea47df62011 100644
--- a/test/Bitcode/tailcall.ll
+++ b/test/Bitcode/tailcall.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Check that musttail and tail roundtrip.
diff --git a/test/Bitcode/terminatorInstructions.3.2.ll b/test/Bitcode/terminatorInstructions.3.2.ll
index 9c70833ae61..d9e51a5996e 100644
--- a/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread terminator instructions from
diff --git a/test/Bitcode/upgrade-global-ctors.ll b/test/Bitcode/upgrade-global-ctors.ll
index bd253a81620..f75b28b7db1 100644
--- a/test/Bitcode/upgrade-global-ctors.ll
+++ b/test/Bitcode/upgrade-global-ctors.ll
@@ -1,3 +1,4 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
diff --git a/test/Bitcode/upgrade-loop-metadata.ll b/test/Bitcode/upgrade-loop-metadata.ll
index 67a8d393592..5c18bd930cc 100644
--- a/test/Bitcode/upgrade-loop-metadata.ll
+++ b/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,6 +1,7 @@
; Test to make sure loop vectorizer metadata is automatically upgraded.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
define void @_Z28loop_with_vectorize_metadatav() {
entry:
diff --git a/test/Bitcode/upgrade-tbaa.ll b/test/Bitcode/upgrade-tbaa.ll
index e7389095b8c..0d88fa6ce3a 100644
--- a/test/Bitcode/upgrade-tbaa.ll
+++ b/test/Bitcode/upgrade-tbaa.ll
@@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Function Attrs: nounwind
define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {
diff --git a/test/Bitcode/vectorInstructions.3.2.ll b/test/Bitcode/vectorInstructions.3.2.ll
index 6d534c2f143..5b983ac0f02 100644
--- a/test/Bitcode/vectorInstructions.3.2.ll
+++ b/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread vector operations of
diff --git a/test/Bitcode/visibility-styles.3.2.ll b/test/Bitcode/visibility-styles.3.2.ll
index ec2ee683206..cccc9509e67 100644
--- a/test/Bitcode/visibility-styles.3.2.ll
+++ b/test/Bitcode/visibility-styles.3.2.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread visibility styles of
diff --git a/test/Bitcode/weak-cmpxchg-upgrade.ll b/test/Bitcode/weak-cmpxchg-upgrade.ll
index dbcd150633e..fd543c4a968 100644
--- a/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.