diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 48d918c1d6c..a796431ae78 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -849,6 +849,8 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand Op,
   case ISD::Constant: {
     uint32_t val = cast<ConstantSDNode>(N)->getValue();
     if(!isRotInt8Immediate(val)) {
+      if (isRotInt8Immediate(~val))
+        return false; //use MVN
       Constant    *C = ConstantInt::get(Type::UIntTy, val);
       int  alignment = 2;
       SDOperand Addr = CurDAG->getTargetConstantPool(C, MVT::i32, alignment);
diff --git a/test/Regression/CodeGen/ARM/mvn.ll b/test/Regression/CodeGen/ARM/mvn.ll
index d425498ea7e..b825cf8ea9b 100644
--- a/test/Regression/CodeGen/ARM/mvn.ll
+++ b/test/Regression/CodeGen/ARM/mvn.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 5
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 6
 
 int %f1() {
 entry:
@@ -53,3 +53,14 @@ entry:
 	%tmp3not = xor int %tmp3, -1		; <int> [#uses=1]
 	ret int %tmp3not
 }
+
+int %f9() {
+entry:
+        %tmp4845 = add int 0, 0
+        br  label %cond_true4848
+
+cond_true4848:          ; preds = %bb4835
+        %tmp4851 = sub int -3, 0                ; <int> [#uses=1]
+        %abc = add int %tmp4851, %tmp4845
+        ret int %abc
+}