From b01bcbd0474879816540dc9292c45b92c07e5c2c Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 15 Oct 2010 02:29:58 +0000 Subject: [PATCH] Encoding info for extension instructions. llvm-svn: 116560 --- lib/Target/ARM/ARMInstrInfo.td | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 703bc1a094a..3942e18dfe1 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -614,6 +614,10 @@ multiclass AI_ext_rrot opcod, string opc, PatFrag opnode> { IIC_iEXTr, opc, "\t$Rd, $Rm", [(set GPR:$Rd, (opnode GPR:$Rm))]>, Requires<[IsARM, HasV6]> { + bits<4> Rd; + bits<4> Rm; + let Inst{15-12} = Rd; + let Inst{3-0} = Rm; let Inst{11-10} = 0b00; let Inst{19-16} = 0b1111; } @@ -621,8 +625,12 @@ multiclass AI_ext_rrot opcod, string opc, PatFrag opnode> { IIC_iEXTr, opc, "\t$Rd, $Rm, ror $rot", [(set GPR:$Rd, (opnode (rotr GPR:$Rm, rot_imm:$rot)))]>, Requires<[IsARM, HasV6]> { + bits<4> Rd; + bits<4> Rm; bits<2> rot; + let Inst{15-12} = Rd; let Inst{11-10} = rot; + let Inst{3-0} = Rm; let Inst{19-16} = 0b1111; } }