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[x86] translating "fp" (floating point) instructions from {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp}
LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr. GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions. Differential Revision: http://reviews.llvm.org/D14217 llvm-svn: 252908
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@ -2218,6 +2218,20 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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(isPrefix && getLexer().is(AsmToken::Slash)))
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Parser.Lex();
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// This is for gas compatibility and cannot be done in td.
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// Adding "p" for some floating point with no argument.
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// For example: fsub --> fsubp
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bool IsFp =
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Name == "fsub" || Name == "fdiv" || Name == "fsubr" || Name == "fdivr";
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if (IsFp && Operands.size() == 1) {
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const char *Repl = StringSwitch<const char *>(Name)
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.Case("fsub", "fsubp")
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.Case("fdiv", "fdivp")
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.Case("fsubr", "fsubrp")
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.Case("fdivr", "fdivrp");
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static_cast<X86Operand &>(*Operands[0]).setTokenValue(Repl);
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}
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// This is a terrible hack to handle "out[bwl]? %al, (%dx)" ->
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// "outb %al, %dx". Out doesn't take a memory form, but this is a widely
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// documented form in various unofficial manuals, so a lot of code uses it.
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@ -2793,8 +2793,10 @@ def : InstAlias<"idiv{q}\t{$src, %rax|rax, $src}", (IDIV64m i64mem:$src)>;
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// Various unary fpstack operations default to operating on on ST1.
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// For example, "fxch" -> "fxch %st(1)"
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def : InstAlias<"faddp", (ADD_FPrST0 ST1), 0>;
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def: InstAlias<"fadd", (ADD_FPrST0 ST1), 0>;
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def : InstAlias<"fsub{|r}p", (SUBR_FPrST0 ST1), 0>;
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def : InstAlias<"fsub{r|}p", (SUB_FPrST0 ST1), 0>;
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def : InstAlias<"fmul", (MUL_FPrST0 ST1), 0>;
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def : InstAlias<"fmulp", (MUL_FPrST0 ST1), 0>;
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def : InstAlias<"fdiv{|r}p", (DIVR_FPrST0 ST1), 0>;
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def : InstAlias<"fdiv{r|}p", (DIV_FPrST0 ST1), 0>;
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@ -15,3 +15,17 @@ _test2:
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.att_syntax prefix
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movl $255, -4(%rsp)
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// CHECK: movl $255, -4(%rsp)
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_test3:
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fadd
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// CHECK: faddp %st(1)
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fmul
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// CHECK: fmulp %st(1)
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fsub
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// CHECK: fsubp %st(1)
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fsubr
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// CHECK: fsubrp %st(1)
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fdiv
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// CHECK: fdivp %st(1)
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fdivr
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// CHECK: fdivrp %st(1)
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@ -533,6 +533,20 @@ fsubrp ST(1)
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fdivp ST(1)
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fdivrp ST(1)
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// CHECK: faddp %st(1)
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// CHECK: fmulp %st(1)
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// CHECK: fsubrp %st(1)
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// CHECK: fsubp %st(1)
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// CHECK: fdivrp %st(1)
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// CHECK: fdivp %st(1)
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fadd
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fmul
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fsub
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fsubr
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fdiv
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fdivr
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// CHECK: faddp %st(1)
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// CHECK: fmulp %st(1)
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// CHECK: fsubrp %st(1)
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