diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index 1ebf13b1d81..01d2cca47a6 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -259,6 +259,7 @@ let Properties = [IntrReadMem] in { def int_log2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_exp2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; + def int_fabs : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; } let Properties = [IntrNoMem] in { diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 83df110d73f..b7a6ec23d6e 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4920,6 +4920,11 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) { case Intrinsic::pow: visitPow(I); return 0; + case Intrinsic::fabs: + setValue(&I, DAG.getNode(ISD::FABS, dl, + getValue(I.getArgOperand(0)).getValueType(), + getValue(I.getArgOperand(0)))); + return 0; case Intrinsic::fma: setValue(&I, DAG.getNode(ISD::FMA, dl, getValue(I.getArgOperand(0)).getValueType(), diff --git a/test/CodeGen/NVPTX/intrinsics.ll b/test/CodeGen/NVPTX/intrinsics.ll new file mode 100644 index 00000000000..afab60ca96a --- /dev/null +++ b/test/CodeGen/NVPTX/intrinsics.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s +; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s + +define ptx_device float @test_fabsf(float %f) { +; CHECK: abs.f32 %f0, %f0; +; CHECK: ret; + %x = call float @llvm.fabs.f32(float %f) + ret float %x +} + +define ptx_device double @test_fabs(double %d) { +; CHECK: abs.f64 %fl0, %fl0; +; CHECK: ret; + %x = call double @llvm.fabs.f64(double %d) + ret double %x +} + +declare float @llvm.fabs.f32(float) +declare double @llvm.fabs.f64(double)