From bffa428d016b77f46a1837d25021afb308fe380f Mon Sep 17 00:00:00 2001
From: Evgeniy Stepanov <eugeni.stepanov@gmail.com>
Date: Mon, 23 Jan 2012 07:57:39 +0000
Subject: [PATCH] An option to selectively enable parts of ARM EHABI support.

This change adds an new value to the --arm-enable-ehabi option that
disables emitting unwinding descriptors. This mode gives a working
backtrace() without the (currently broken) exception support.

llvm-svn: 148686
---
 include/llvm/MC/MCAsmInfo.h                  |  1 +
 lib/CodeGen/AsmPrinter/ARMException.cpp      | 25 ++++++++++++++++----
 lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp |  7 ++----
 test/CodeGen/ARM/ehabi-unwind.ll             |  5 ++--
 4 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/include/llvm/MC/MCAsmInfo.h b/include/llvm/MC/MCAsmInfo.h
index 5accabcd9f4..ded30d824ec 100644
--- a/include/llvm/MC/MCAsmInfo.h
+++ b/include/llvm/MC/MCAsmInfo.h
@@ -30,6 +30,7 @@ namespace llvm {
 
   namespace ExceptionHandling {
     enum ExceptionsType { None, DwarfCFI, SjLj, ARM, Win64 };
+    enum ARMEHABIMode { ARMEHABIDisabled, ARMEHABIUnwind, ARMEHABIFull };
   }
 
   namespace LCOMM {
diff --git a/lib/CodeGen/AsmPrinter/ARMException.cpp b/lib/CodeGen/AsmPrinter/ARMException.cpp
index 3f238732536..e5a7d05f4c5 100644
--- a/lib/CodeGen/AsmPrinter/ARMException.cpp
+++ b/lib/CodeGen/AsmPrinter/ARMException.cpp
@@ -29,6 +29,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Dwarf.h"
 #include "llvm/Support/FormattedStream.h"
 #include "llvm/ADT/SmallString.h"
@@ -36,6 +37,18 @@
 #include "llvm/ADT/Twine.h"
 using namespace llvm;
 
+cl::opt<ExceptionHandling::ARMEHABIMode>
+EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
+    cl::desc("Generate ARM EHABI tables:"),
+    cl::values(clEnumValN(ExceptionHandling::ARMEHABIDisabled, "no",
+            "Do not generate ARM EHABI tables"),
+        clEnumValN(ExceptionHandling::ARMEHABIUnwind, "unwind",
+            "Emit unwinding instructions, but not descriptors"),
+        clEnumValN(ExceptionHandling::ARMEHABIFull, "full",
+            "Generate full ARM EHABI tables"),
+        clEnumValEnd));
+
+
 ARMException::ARMException(AsmPrinter *A)
   : DwarfException(A),
     shouldEmitTable(false), shouldEmitMoves(false), shouldEmitTableModule(false)
@@ -72,13 +85,15 @@ void ARMException::EndFunction() {
       Asm->OutStreamer.EmitPersonality(PerSym);
     }
 
-    // Map all labels and get rid of any dead landing pads.
-    MMI->TidyLandingPads();
+    if (EnableARMEHABI == ExceptionHandling::ARMEHABIFull) {
+      // Map all labels and get rid of any dead landing pads.
+      MMI->TidyLandingPads();
 
-    Asm->OutStreamer.EmitHandlerData();
+      Asm->OutStreamer.EmitHandlerData();
 
-    // Emit actual exception table
-    EmitExceptionTable();
+      // Emit actual exception table
+      EmitExceptionTable();
+    }
   }
 
   Asm->OutStreamer.EmitFnEnd();
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
index d1804a2e45b..db21defb7c9 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
@@ -16,10 +16,7 @@
 
 using namespace llvm;
 
-cl::opt<bool>
-EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
-  cl::desc("Generate ARM EHABI tables"),
-  cl::init(false));
+extern cl::opt<ExceptionHandling::ARMEHABIMode> EnableARMEHABI;
 
 
 static const char *const arm_asm_table[] = {
@@ -82,6 +79,6 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
   SupportsDebugInformation = true;
 
   // Exceptions handling
-  if (EnableARMEHABI)
+  if (EnableARMEHABI != ExceptionHandling::ARMEHABIDisabled)
     ExceptionsType = ExceptionHandling::ARM;
 }
diff --git a/test/CodeGen/ARM/ehabi-unwind.ll b/test/CodeGen/ARM/ehabi-unwind.ll
index 1ffde00365a..51595677b70 100644
--- a/test/CodeGen/ARM/ehabi-unwind.ll
+++ b/test/CodeGen/ARM/ehabi-unwind.ll
@@ -1,7 +1,8 @@
 ; Test that the EHABI unwind instruction generator does not encounter any
 ; unfamiliar instructions.
-; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim
-; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi
+; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=full -disable-fp-elim
+; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=full
+; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=unwind
 
 define void @_Z1fv() nounwind {
 entry: