From da3290e68c685c8f1954617552ce2096a784c9ff Mon Sep 17 00:00:00 2001 From: Kevin Enderby Date: Tue, 15 Sep 2009 00:27:25 +0000 Subject: [PATCH] Added the first bits of the ARM target assembler to llvm-mc. For now it only parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will give an error is called. Broke out the test of the .word directive into two different test cases, one for x86 and one for arm. llvm-svn: 81817 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 93 +++++++++++++++++++++++ lib/Target/ARM/AsmParser/CMakeLists.txt | 6 ++ lib/Target/ARM/AsmParser/Makefile | 15 ++++ lib/Target/ARM/Makefile | 2 +- test/MC/AsmParser/arm_word_directive.s | 6 ++ test/MC/AsmParser/directive_values.s | 5 -- test/MC/AsmParser/x86_word_directive.s | 6 ++ 7 files changed, 127 insertions(+), 6 deletions(-) create mode 100644 lib/Target/ARM/AsmParser/ARMAsmParser.cpp create mode 100644 lib/Target/ARM/AsmParser/CMakeLists.txt create mode 100644 lib/Target/ARM/AsmParser/Makefile create mode 100644 test/MC/AsmParser/arm_word_directive.s create mode 100644 test/MC/AsmParser/x86_word_directive.s diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp new file mode 100644 index 00000000000..c0ca1493e9d --- /dev/null +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -0,0 +1,93 @@ +//===-- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions ------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "ARM.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmLexer.h" +#include "llvm/MC/MCAsmParser.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Target/TargetRegistry.h" +#include "llvm/Target/TargetAsmParser.h" +using namespace llvm; + +namespace { +struct ARMOperand; + +class ARMAsmParser : public TargetAsmParser { + MCAsmParser &Parser; + +private: + MCAsmParser &getParser() const { return Parser; } + + MCAsmLexer &getLexer() const { return Parser.getLexer(); } + + void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); } + + bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); } + + bool ParseDirectiveWord(unsigned Size, SMLoc L); + +public: + ARMAsmParser(const Target &T, MCAsmParser &_Parser) + : TargetAsmParser(T), Parser(_Parser) {} + + virtual bool ParseInstruction(const StringRef &Name, MCInst &Inst); + + virtual bool ParseDirective(AsmToken DirectiveID); +}; + +} // end anonymous namespace + +bool ARMAsmParser::ParseInstruction(const StringRef &Name, MCInst &Inst) { + SMLoc Loc = getLexer().getTok().getLoc(); + Error(Loc, "ARMAsmParser::ParseInstruction currently unimplemented"); + return true; +} + +bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) { + StringRef IDVal = DirectiveID.getIdentifier(); + if (IDVal == ".word") + return ParseDirectiveWord(4, DirectiveID.getLoc()); + return true; +} + +/// ParseDirectiveWord +/// ::= .word [ expression (, expression)* ] +bool ARMAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) { + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + const MCExpr *Value; + if (getParser().ParseExpression(Value)) + return true; + + getParser().getStreamer().EmitValue(Value, Size); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + // FIXME: Improve diagnostic. + if (getLexer().isNot(AsmToken::Comma)) + return Error(L, "unexpected token in directive"); + getLexer().Lex(); + } + } + + getLexer().Lex(); + return false; +} + +// Force static initialization. +extern "C" void LLVMInitializeARMAsmParser() { + RegisterAsmParser X(TheARMTarget); + RegisterAsmParser Y(TheThumbTarget); +} diff --git a/lib/Target/ARM/AsmParser/CMakeLists.txt b/lib/Target/ARM/AsmParser/CMakeLists.txt new file mode 100644 index 00000000000..e47c643eee9 --- /dev/null +++ b/lib/Target/ARM/AsmParser/CMakeLists.txt @@ -0,0 +1,6 @@ +include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) + +add_llvm_library(LLVMARMAsmParser + ARMAsmParser.cpp + ) +add_dependencies(LLVMARMAsmParser) diff --git a/lib/Target/ARM/AsmParser/Makefile b/lib/Target/ARM/AsmParser/Makefile new file mode 100644 index 00000000000..97e56126d8e --- /dev/null +++ b/lib/Target/ARM/AsmParser/Makefile @@ -0,0 +1,15 @@ +##===- lib/Target/ARM/AsmParser/Makefile -------------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## +LEVEL = ../../../.. +LIBRARYNAME = LLVMARMAsmParser + +# Hack: we need to include 'main' ARM target directory to grab private headers +CPPFLAGS = -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. + +include $(LEVEL)/Makefile.common diff --git a/lib/Target/ARM/Makefile b/lib/Target/ARM/Makefile index d879521a2db..a8dd38cb362 100644 --- a/lib/Target/ARM/Makefile +++ b/lib/Target/ARM/Makefile @@ -18,6 +18,6 @@ BUILT_SOURCES = ARMGenRegisterInfo.h.inc ARMGenRegisterNames.inc \ ARMGenDAGISel.inc ARMGenSubtarget.inc \ ARMGenCodeEmitter.inc ARMGenCallingConv.inc -DIRS = AsmPrinter TargetInfo +DIRS = AsmPrinter AsmParser TargetInfo include $(LEVEL)/Makefile.common diff --git a/test/MC/AsmParser/arm_word_directive.s b/test/MC/AsmParser/arm_word_directive.s new file mode 100644 index 00000000000..78336913169 --- /dev/null +++ b/test/MC/AsmParser/arm_word_directive.s @@ -0,0 +1,6 @@ +@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s + +@ CHECK: TEST0: +@ CHECK: .long 3 +TEST0: + .word 3 diff --git a/test/MC/AsmParser/directive_values.s b/test/MC/AsmParser/directive_values.s index 900fb7386d0..beac69a4aeb 100644 --- a/test/MC/AsmParser/directive_values.s +++ b/test/MC/AsmParser/directive_values.s @@ -19,8 +19,3 @@ TEST2: # CHECK: .quad 9 TEST3: .quad 9 - -# CHECK: TEST4: -# CHECK: .short 3 -TEST4: - .word 3 diff --git a/test/MC/AsmParser/x86_word_directive.s b/test/MC/AsmParser/x86_word_directive.s new file mode 100644 index 00000000000..2950c8cd5f1 --- /dev/null +++ b/test/MC/AsmParser/x86_word_directive.s @@ -0,0 +1,6 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK: TEST0: +# CHECK: .short 3 +TEST0: + .word 3