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Rename the MIPS routine abiUsesSoftFloat -> useSoftFloat to match
some incoming changes and the general scheme used by features (use/has). llvm-svn: 236794
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f3e4ffec22
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@ -434,7 +434,7 @@ public:
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return STI.getFeatureBits() & Mips::FeatureMips16;
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}
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bool abiUsesSoftFloat() const {
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bool useSoftFloat() const {
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return (STI.getFeatureBits() & Mips::FeatureSoftFloat);
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}
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@ -131,7 +131,7 @@ public:
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template <class PredicateLibrary>
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void setCPR1SizeFromPredicates(const PredicateLibrary &P) {
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if (P.abiUsesSoftFloat())
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if (P.useSoftFloat())
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CPR1Size = Mips::AFL_REG_NONE;
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else if (P.hasMSA())
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CPR1Size = Mips::AFL_REG_128;
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@ -159,7 +159,7 @@ public:
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Is32BitABI = P.isABI_O32();
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FpABI = FpABIKind::ANY;
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if (P.abiUsesSoftFloat())
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if (P.useSoftFloat())
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FpABI = FpABIKind::SOFT;
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else if (P.isABI_N32() || P.isABI_N64())
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FpABI = FpABIKind::S64;
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@ -127,7 +127,7 @@ Mips16TargetLowering::Mips16TargetLowering(const MipsTargetMachine &TM,
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// Set up the register classes
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addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
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if (!Subtarget.abiUsesSoftFloat())
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if (!Subtarget.useSoftFloat())
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setMips16HardFloatLibCalls();
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setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand);
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@ -64,9 +64,9 @@ def RetCC_F128HardFloat : CallingConv<[
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// Handle F128 specially since we can't identify the original type during the
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// tablegen-erated code.
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def RetCC_F128 : CallingConv<[
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CCIfSubtarget<"abiUsesSoftFloat()",
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CCIfSubtarget<"useSoftFloat()",
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CCIfType<[i64], CCDelegateTo<RetCC_F128SoftFloat>>>,
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CCIfSubtargetNot<"abiUsesSoftFloat()",
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CCIfSubtargetNot<"useSoftFloat()",
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CCIfType<[i64], CCDelegateTo<RetCC_F128HardFloat>>>
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]>;
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@ -134,7 +134,7 @@ def CC_MipsN : CallingConv<[
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CCIfType<[i8, i16, i32], CCIfOrigArgWasNotFloat<CCPromoteToType<i64>>>,
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// The only i32's we have left are soft-float arguments.
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CCIfSubtarget<"abiUsesSoftFloat()", CCIfType<[i32], CCDelegateTo<CC_MipsN_SoftFloat>>>,
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CCIfSubtarget<"useSoftFloat()", CCIfType<[i32], CCDelegateTo<CC_MipsN_SoftFloat>>>,
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// Integer arguments are passed in integer registers.
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CCIfType<[i64], CCAssignToRegWithShadow<[A0_64, A1_64, A2_64, A3_64,
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@ -372,7 +372,7 @@ def CC_Mips_FixedArg : CallingConv<[
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// f128 should only occur for the N64 ABI where long double is 128-bit. On
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// N32, long double is equivalent to double.
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CCIfType<[i64],
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CCIfSubtargetNot<"abiUsesSoftFloat()",
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CCIfSubtargetNot<"useSoftFloat()",
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CCIfOrigArgWasF128<CCBitConvertToType<f64>>>>,
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CCIfCC<"CallingConv::Fast", CCDelegateTo<CC_Mips_FastCC>>,
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@ -3017,7 +3017,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
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// when allocating floating point values to integer registers.
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// This shouldn't influence how we load the value into registers unless
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// we are targetting softfloat.
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if (VA.getValVT().isFloatingPoint() && !Subtarget.abiUsesSoftFloat())
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if (VA.getValVT().isFloatingPoint() && !Subtarget.useSoftFloat())
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LocVT = VA.getValVT();
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}
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@ -3087,7 +3087,7 @@ MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
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bool
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MipsTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {
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if (Subtarget.hasMips3() && Subtarget.abiUsesSoftFloat()) {
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if (Subtarget.hasMips3() && Subtarget.useSoftFloat()) {
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if (Type == MVT::i32)
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return true;
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}
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@ -65,7 +65,7 @@ def IsSingleFloat : Predicate<"Subtarget->isSingleFloat()">,
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AssemblerPredicate<"FeatureSingleFloat">;
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def IsNotSingleFloat : Predicate<"!Subtarget->isSingleFloat()">,
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AssemblerPredicate<"!FeatureSingleFloat">;
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def IsNotSoftFloat : Predicate<"!Subtarget->abiUsesSoftFloat()">,
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def IsNotSoftFloat : Predicate<"!Subtarget->useSoftFloat()">,
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AssemblerPredicate<"!FeatureSoftFloat">;
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//===----------------------------------------------------------------------===//
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@ -99,7 +99,7 @@ MipsSETargetLowering::MipsSETargetLowering(const MipsTargetMachine &TM,
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setTargetDAGCombine(ISD::XOR);
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}
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if (!Subtarget.abiUsesSoftFloat()) {
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if (!Subtarget.useSoftFloat()) {
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addRegisterClass(MVT::f32, &Mips::FGR32RegClass);
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// When dealing with single precision only, use libcalls
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@ -236,9 +236,7 @@ public:
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bool hasStandardEncoding() const { return !inMips16Mode(); }
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bool abiUsesSoftFloat() const {
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return IsSoftFloat && !InMips16HardFloat;
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}
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bool useSoftFloat() const { return IsSoftFloat && !InMips16HardFloat; }
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bool enableLongBranchPass() const {
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return hasStandardEncoding() || allowMixed16_32();
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