diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp index 6fe654c9051..89d0ad64e0b 100644 --- a/lib/Target/X86/X86AsmPrinter.cpp +++ b/lib/Target/X86/X86AsmPrinter.cpp @@ -71,7 +71,7 @@ namespace { bool firstByte; }; - struct Printer : public MachineFunctionPass { + struct X86AsmPrinter : public MachineFunctionPass { /// Output stream on which we're printing assembly code. /// std::ostream &O; @@ -85,7 +85,7 @@ namespace { /// Mangler *Mang; - Printer(std::ostream &o, TargetMachine &tm) : O(o), TM(tm) { } + X86AsmPrinter(std::ostream &o, TargetMachine &tm) : O(o), TM(tm) { } /// Cache of mangled name for current function. This is /// recalculated at the beginning of each call to @@ -97,6 +97,12 @@ namespace { return "X86 Assembly Printer"; } + /// printInstruction - This method is automatically generated by tablegen + /// from the instruction set description. This method returns true if the + /// machine instruction was sufficiently described to print it, otherwise it + /// returns false. + bool printInstruction(const MachineInstr *MI); + void printImplUsesBefore(const TargetInstrDescriptor &Desc); bool printImplDefsBefore(const TargetInstrDescriptor &Desc); bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC); @@ -119,9 +125,14 @@ namespace { /// regardless of whether the function is in SSA form. /// FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){ - return new Printer(o, tm); + return new X86AsmPrinter(o, tm); } + +// Include the auto-generated portion of the assembly writer. +#include "X86GenAsmWriter.inc" + + /// toOctal - Convert the low order bits of X into an octal digit. /// static inline char toOctal(int X) { @@ -165,7 +176,7 @@ static void printAsCString(std::ostream &O, const ConstantArray *CVA) { // Print out the specified constant, without a storage class. Only the // constants valid in constant expressions can occur here. -void Printer::emitConstantValueOnly(const Constant *CV) { +void X86AsmPrinter::emitConstantValueOnly(const Constant *CV) { if (CV->isNullValue()) O << "0"; else if (const ConstantBool *CB = dyn_cast(CV)) { @@ -238,7 +249,7 @@ void Printer::emitConstantValueOnly(const Constant *CV) { // Print a constant value or values, with the appropriate storage class as a // prefix. -void Printer::emitGlobalConstant(const Constant *CV) { +void X86AsmPrinter::emitGlobalConstant(const Constant *CV) { const TargetData &TD = TM.getTargetData(); if (CV->isNullValue()) { @@ -338,7 +349,7 @@ void Printer::emitGlobalConstant(const Constant *CV) { /// used to print out constants which have been "spilled to memory" by /// the code generator. /// -void Printer::printConstantPool(MachineConstantPool *MCP) { +void X86AsmPrinter::printConstantPool(MachineConstantPool *MCP) { const std::vector &CP = MCP->getConstants(); const TargetData &TD = TM.getTargetData(); @@ -357,7 +368,7 @@ void Printer::printConstantPool(MachineConstantPool *MCP) { /// runOnMachineFunction - This uses the printMachineInstruction() /// method to print assembly for each instruction. /// -bool Printer::runOnMachineFunction(MachineFunction &MF) { +bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) { O << "\n\n"; // What's my mangled name? CurrentFnName = Mang->getValueName(MF.getFunction()); @@ -407,8 +418,8 @@ static bool isMem(const MachineInstr *MI, unsigned Op) { -void Printer::printOp(const MachineOperand &MO, - bool elideOffsetKeyword /* = false */) { +void X86AsmPrinter::printOp(const MachineOperand &MO, + bool elideOffsetKeyword /* = false */) { const MRegisterInfo &RI = *TM.getRegisterInfo(); switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: @@ -464,7 +475,7 @@ static const char* const sizePtr(const TargetInstrDescriptor &Desc) { } } -void Printer::printMemReference(const MachineInstr *MI, unsigned Op) { +void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op) { assert(isMem(MI, Op) && "Invalid memory reference!"); if (MI->getOperand(Op).isFrameIndex()) { @@ -519,11 +530,11 @@ void Printer::printMemReference(const MachineInstr *MI, unsigned Op) { /// printImplUsesBefore - Emit the implicit-use registers for the instruction /// described by DESC, if its PrintImplUsesBefore flag is set. /// -void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) { +void X86AsmPrinter::printImplUsesBefore(const TargetInstrDescriptor &Desc) { const MRegisterInfo &RI = *TM.getRegisterInfo(); if (Desc.TSFlags & X86II::PrintImplUsesBefore) { for (const unsigned *p = Desc.ImplicitUses; *p; ++p) { - // Bug Workaround: See note in Printer::doInitialization about %. + // Bug Workaround: See note in X86AsmPrinter::doInitialization about %. O << "%" << RI.get(*p).Name << ", "; } } @@ -533,7 +544,7 @@ void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) { /// described by DESC, if its PrintImplUsesBefore flag is set. Return true if /// we printed any registers. /// -bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) { +bool X86AsmPrinter::printImplDefsBefore(const TargetInstrDescriptor &Desc) { bool Printed = false; const MRegisterInfo &RI = *TM.getRegisterInfo(); if (Desc.TSFlags & X86II::PrintImplDefsBefore) { @@ -544,7 +555,7 @@ bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) { ++p; } while (*p) { - // Bug Workaround: See note in Printer::doInitialization about %. + // Bug Workaround: See note in X86AsmPrinter::doInitialization about %. O << ", %" << RI.get(*p).Name; ++p; } @@ -564,8 +575,8 @@ bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) { /// true - Emitted one or more registers. /// false - Emitted no registers. /// -bool Printer::printImplUsesAfter(const TargetInstrDescriptor &Desc, - const bool Comma = true) { +bool X86AsmPrinter::printImplUsesAfter(const TargetInstrDescriptor &Desc, + const bool Comma = true) { const MRegisterInfo &RI = *TM.getRegisterInfo(); if (Desc.TSFlags & X86II::PrintImplUsesAfter) { bool emitted = false; @@ -576,7 +587,7 @@ bool Printer::printImplUsesAfter(const TargetInstrDescriptor &Desc, ++p; } while (*p) { - // Bug Workaround: See note in Printer::doInitialization about %. + // Bug Workaround: See note in X86AsmPrinter::doInitialization about %. O << ", %" << RI.get(*p).Name; ++p; } @@ -596,8 +607,8 @@ bool Printer::printImplUsesAfter(const TargetInstrDescriptor &Desc, /// true - Emitted one or more registers. /// false - Emitted no registers. /// -bool Printer::printImplDefsAfter(const TargetInstrDescriptor &Desc, - const bool Comma = true) { +bool X86AsmPrinter::printImplDefsAfter(const TargetInstrDescriptor &Desc, + const bool Comma = true) { const MRegisterInfo &RI = *TM.getRegisterInfo(); if (Desc.TSFlags & X86II::PrintImplDefsAfter) { bool emitted = false; @@ -608,7 +619,7 @@ bool Printer::printImplDefsAfter(const TargetInstrDescriptor &Desc, ++p; } while (*p) { - // Bug Workaround: See note in Printer::doInitialization about %. + // Bug Workaround: See note in X86AsmPrinter::doInitialization about %. O << ", %" << RI.get(*p).Name; ++p; } @@ -620,12 +631,15 @@ bool Printer::printImplDefsAfter(const TargetInstrDescriptor &Desc, /// printMachineInstruction -- Print out a single X86 LLVM instruction /// MI in Intel syntax to the current output stream. /// -void Printer::printMachineInstruction(const MachineInstr *MI) { +void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) { + ++EmittedInsts; + if (printInstruction(MI)) + return; // Printer was automatically generated + unsigned Opcode = MI->getOpcode(); const TargetInstrInfo &TII = *TM.getInstrInfo(); const TargetInstrDescriptor &Desc = TII.get(Opcode); - ++EmittedInsts; switch (Desc.TSFlags & X86II::FormMask) { case X86II::Pseudo: // Print pseudo-instructions as comments; either they should have been @@ -665,17 +679,15 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { case X86II::RawFrm: { // The accepted forms of Raw instructions are: - // 1. nop - No operand required - // 2. jmp foo - MachineBasicBlock operand - // 3. call bar - GlobalAddress Operand or External Symbol Operand - // 4. in AL, imm - Immediate operand + // 1. jmp foo - MachineBasicBlock operand + // 2. call bar - GlobalAddress Operand or External Symbol Operand + // 3. in AL, imm - Immediate operand // - assert(MI->getNumOperands() == 0 || - (MI->getNumOperands() == 1 && - (MI->getOperand(0).isMachineBasicBlock() || - MI->getOperand(0).isGlobalAddress() || - MI->getOperand(0).isExternalSymbol() || - MI->getOperand(0).isImmediate())) && + assert(MI->getNumOperands() == 1 && + (MI->getOperand(0).isMachineBasicBlock() || + MI->getOperand(0).isGlobalAddress() || + MI->getOperand(0).isExternalSymbol() || + MI->getOperand(0).isImmediate()) && "Illegal raw instruction!"); O << TII.getName(MI->getOpcode()) << " "; @@ -940,7 +952,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { } } -bool Printer::doInitialization(Module &M) { +bool X86AsmPrinter::doInitialization(Module &M) { // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly. // // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an @@ -966,7 +978,7 @@ static void SwitchSection(std::ostream &OS, std::string &CurSection, } } -bool Printer::doFinalization(Module &M) { +bool X86AsmPrinter::doFinalization(Module &M) { const TargetData &TD = TM.getTargetData(); std::string CurSection;