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https://github.com/RPCS3/llvm-mirror.git
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Delete a bunch of redundant predicates.
llvm-svn: 97201
This commit is contained in:
Dan Gohman
parent
720095c22c
commit
e794389ad0
@ -822,9 +822,9 @@ def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst),
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let AddedComplexity = 20 in {
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def : Pat<(v4f32 (movddup VR128:$src, (undef))),
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(MOVLHPSrr VR128:$src, VR128:$src)>, Requires<[HasSSE1]>;
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(MOVLHPSrr VR128:$src, VR128:$src)>;
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def : Pat<(v2i64 (movddup VR128:$src, (undef))),
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(MOVLHPSrr VR128:$src, VR128:$src)>, Requires<[HasSSE1]>;
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(MOVLHPSrr VR128:$src, VR128:$src)>;
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}
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@ -1084,13 +1084,11 @@ let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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def V_SET0 : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "",
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[(set VR128:$dst, (v4i32 immAllZerosV))]>;
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let Predicates = [HasSSE1] in {
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def : Pat<(v2i64 immAllZerosV), (V_SET0)>;
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def : Pat<(v8i16 immAllZerosV), (V_SET0)>;
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def : Pat<(v16i8 immAllZerosV), (V_SET0)>;
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def : Pat<(v2f64 immAllZerosV), (V_SET0)>;
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def : Pat<(v4f32 immAllZerosV), (V_SET0)>;
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}
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def : Pat<(v2i64 immAllZerosV), (V_SET0)>;
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def : Pat<(v8i16 immAllZerosV), (V_SET0)>;
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def : Pat<(v16i8 immAllZerosV), (V_SET0)>;
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def : Pat<(v2f64 immAllZerosV), (V_SET0)>;
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def : Pat<(v4f32 immAllZerosV), (V_SET0)>;
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// FR32 to 128-bit vector conversion.
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let isAsCheapAsAMove = 1 in
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@ -3051,13 +3049,13 @@ let Predicates = [HasSSE2] in {
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let AddedComplexity = 15 in {
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// Zeroing a VR128 then do a MOVS{S|D} to the lower bits.
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def : Pat<(v2f64 (X86vzmovl (v2f64 (scalar_to_vector FR64:$src)))),
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(MOVLSD2PDrr (V_SET0), FR64:$src)>, Requires<[HasSSE2]>;
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(MOVLSD2PDrr (V_SET0), FR64:$src)>;
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def : Pat<(v4f32 (X86vzmovl (v4f32 (scalar_to_vector FR32:$src)))),
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(MOVLSS2PSrr (V_SET0), FR32:$src)>, Requires<[HasSSE1]>;
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(MOVLSS2PSrr (V_SET0), FR32:$src)>;
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def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
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(MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE1]>;
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(MOVLPSrr (V_SET0), VR128:$src)>;
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def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
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(MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE1]>;
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(MOVLPSrr (V_SET0), VR128:$src)>;
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}
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// Splat v2f64 / v2i64
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@ -3075,8 +3073,7 @@ def : Pat<(unpckh (v2i64 VR128:$src), (undef)),
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// Special unary SHUFPSrri case.
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def : Pat<(v4f32 (pshufd:$src3 VR128:$src1, (undef))),
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(SHUFPSrri VR128:$src1, VR128:$src1,
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(SHUFFLE_get_shuf_imm VR128:$src3))>,
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Requires<[HasSSE1]>;
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(SHUFFLE_get_shuf_imm VR128:$src3))>;
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let AddedComplexity = 5 in
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def : Pat<(v4f32 (pshufd:$src2 VR128:$src1, (undef))),
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(PSHUFDri VR128:$src1, (SHUFFLE_get_shuf_imm VR128:$src2))>,
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@ -3122,13 +3119,13 @@ def : Pat<(v4f32 (unpckl_undef:$src2 VR128:$src, (undef))),
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}
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let AddedComplexity = 10 in {
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def : Pat<(v4f32 (unpckl_undef VR128:$src, (undef))),
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(UNPCKLPSrr VR128:$src, VR128:$src)>, Requires<[HasSSE1]>;
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(UNPCKLPSrr VR128:$src, VR128:$src)>;
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def : Pat<(v16i8 (unpckl_undef VR128:$src, (undef))),
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(PUNPCKLBWrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKLBWrr VR128:$src, VR128:$src)>;
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def : Pat<(v8i16 (unpckl_undef VR128:$src, (undef))),
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(PUNPCKLWDrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKLWDrr VR128:$src, VR128:$src)>;
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def : Pat<(v4i32 (unpckl_undef VR128:$src, (undef))),
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(PUNPCKLDQrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKLDQrr VR128:$src, VR128:$src)>;
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}
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// vector_shuffle v1, <undef>, <2, 2, 3, 3, ...>
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@ -3142,13 +3139,13 @@ def : Pat<(v4f32 (unpckh_undef:$src2 VR128:$src, (undef))),
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}
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let AddedComplexity = 10 in {
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def : Pat<(v4f32 (unpckh_undef VR128:$src, (undef))),
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(UNPCKHPSrr VR128:$src, VR128:$src)>, Requires<[HasSSE1]>;
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(UNPCKHPSrr VR128:$src, VR128:$src)>;
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def : Pat<(v16i8 (unpckh_undef VR128:$src, (undef))),
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(PUNPCKHBWrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKHBWrr VR128:$src, VR128:$src)>;
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def : Pat<(v8i16 (unpckh_undef VR128:$src, (undef))),
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(PUNPCKHWDrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKHWDrr VR128:$src, VR128:$src)>;
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def : Pat<(v4i32 (unpckh_undef VR128:$src, (undef))),
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(PUNPCKHDQrr VR128:$src, VR128:$src)>, Requires<[HasSSE2]>;
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(PUNPCKHDQrr VR128:$src, VR128:$src)>;
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}
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let AddedComplexity = 20 in {
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@ -3170,25 +3167,25 @@ def : Pat<(v4i32 (movhlps_undef VR128:$src1, (undef))),
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let AddedComplexity = 20 in {
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// vector_shuffle v1, (load v2) <4, 5, 2, 3> using MOVLPS
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def : Pat<(v4f32 (movlp VR128:$src1, (load addr:$src2))),
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(MOVLPSrm VR128:$src1, addr:$src2)>, Requires<[HasSSE1]>;
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(MOVLPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2f64 (movlp VR128:$src1, (load addr:$src2))),
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(MOVLPDrm VR128:$src1, addr:$src2)>, Requires<[HasSSE2]>;
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(MOVLPDrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4i32 (movlp VR128:$src1, (load addr:$src2))),
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(MOVLPSrm VR128:$src1, addr:$src2)>, Requires<[HasSSE2]>;
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(MOVLPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2i64 (movlp VR128:$src1, (load addr:$src2))),
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(MOVLPDrm VR128:$src1, addr:$src2)>, Requires<[HasSSE2]>;
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(MOVLPDrm VR128:$src1, addr:$src2)>;
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}
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// (store (vector_shuffle (load addr), v2, <4, 5, 2, 3>), addr) using MOVLPS
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def : Pat<(store (v4f32 (movlp (load addr:$src1), VR128:$src2)), addr:$src1),
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(MOVLPSmr addr:$src1, VR128:$src2)>, Requires<[HasSSE1]>;
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(MOVLPSmr addr:$src1, VR128:$src2)>;
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def : Pat<(store (v2f64 (movlp (load addr:$src1), VR128:$src2)), addr:$src1),
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(MOVLPDmr addr:$src1, VR128:$src2)>, Requires<[HasSSE2]>;
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(MOVLPDmr addr:$src1, VR128:$src2)>;
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def : Pat<(store (v4i32 (movlp (bc_v4i32 (loadv2i64 addr:$src1)), VR128:$src2)),
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addr:$src1),
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(MOVLPSmr addr:$src1, VR128:$src2)>, Requires<[HasSSE1]>;
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(MOVLPSmr addr:$src1, VR128:$src2)>;
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def : Pat<(store (v2i64 (movlp (load addr:$src1), VR128:$src2)), addr:$src1),
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(MOVLPDmr addr:$src1, VR128:$src2)>, Requires<[HasSSE2]>;
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(MOVLPDmr addr:$src1, VR128:$src2)>;
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let AddedComplexity = 15 in {
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// Setting the lowest element in the vector.
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@ -3208,7 +3205,7 @@ def : Pat<(v4i32 (movlp VR128:$src1, VR128:$src2)),
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// fall back to this for SSE1)
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def : Pat<(v4f32 (movlp:$src3 VR128:$src1, (v4f32 VR128:$src2))),
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(SHUFPSrri VR128:$src2, VR128:$src1,
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(SHUFFLE_get_shuf_imm VR128:$src3))>, Requires<[HasSSE1]>;
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(SHUFFLE_get_shuf_imm VR128:$src3))>;
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// Set lowest element and zero upper elements.
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let AddedComplexity = 15 in
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@ -3250,30 +3247,30 @@ def : Pat<(v2i32 (fp_to_sint (v2f64 VR128:$src))),
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// Use movaps / movups for SSE integer load / store (one byte shorter).
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def : Pat<(alignedloadv4i32 addr:$src),
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(MOVAPSrm addr:$src)>, Requires<[HasSSE1]>;
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(MOVAPSrm addr:$src)>;
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def : Pat<(loadv4i32 addr:$src),
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(MOVUPSrm addr:$src)>, Requires<[HasSSE1]>;
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(MOVUPSrm addr:$src)>;
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def : Pat<(alignedloadv2i64 addr:$src),
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(MOVAPSrm addr:$src)>, Requires<[HasSSE2]>;
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(MOVAPSrm addr:$src)>;
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def : Pat<(loadv2i64 addr:$src),
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(MOVUPSrm addr:$src)>, Requires<[HasSSE2]>;
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(MOVUPSrm addr:$src)>;
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def : Pat<(alignedstore (v2i64 VR128:$src), addr:$dst),
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(MOVAPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVAPSmr addr:$dst, VR128:$src)>;
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def : Pat<(alignedstore (v4i32 VR128:$src), addr:$dst),
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(MOVAPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVAPSmr addr:$dst, VR128:$src)>;
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def : Pat<(alignedstore (v8i16 VR128:$src), addr:$dst),
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(MOVAPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVAPSmr addr:$dst, VR128:$src)>;
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def : Pat<(alignedstore (v16i8 VR128:$src), addr:$dst),
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(MOVAPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVAPSmr addr:$dst, VR128:$src)>;
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def : Pat<(store (v2i64 VR128:$src), addr:$dst),
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(MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVUPSmr addr:$dst, VR128:$src)>;
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def : Pat<(store (v4i32 VR128:$src), addr:$dst),
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(MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVUPSmr addr:$dst, VR128:$src)>;
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def : Pat<(store (v8i16 VR128:$src), addr:$dst),
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(MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVUPSmr addr:$dst, VR128:$src)>;
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def : Pat<(store (v16i8 VR128:$src), addr:$dst),
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(MOVUPSmr addr:$dst, VR128:$src)>, Requires<[HasSSE2]>;
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(MOVUPSmr addr:$dst, VR128:$src)>;
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//===----------------------------------------------------------------------===//
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// SSE4.1 Instructions
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