From eeb400322e552f6888f223eaedc80aa8db29683c Mon Sep 17 00:00:00 2001
From: Nadav Rotem <nadav.rotem@intel.com>
Date: Sun, 16 Oct 2011 21:20:54 +0000
Subject: [PATCH] Add tripple and stabalize a few more tests.

llvm-svn: 142158
---
 test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll |  2 +-
 test/CodeGen/X86/mmx-pinsrw.ll                  |  2 +-
 test/CodeGen/X86/vsplit-and.ll                  |  2 +-
 test/CodeGen/X86/widen_load-0.ll                | 16 ++++++++--------
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll
index 07ef53e09d8..025ab2e7c11 100644
--- a/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll
+++ b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx | grep movl | count 2
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx | grep movd | count 3
 
 define i64 @a(i32 %a, i32 %b) nounwind readnone {
 entry:
diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll
index cc31a119bd6..91ab668a883 100644
--- a/test/CodeGen/X86/mmx-pinsrw.ll
+++ b/test/CodeGen/X86/mmx-pinsrw.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pinsr 
+; RUN: llc < %s  -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep pinsr 
 ; PR2562
 
 external global i16		; <i16*>:0 [#uses=1]
diff --git a/test/CodeGen/X86/vsplit-and.ll b/test/CodeGen/X86/vsplit-and.ll
index f9944ce2cb7..2c586ab8847 100644
--- a/test/CodeGen/X86/vsplit-and.ll
+++ b/test/CodeGen/X86/vsplit-and.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 |  FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -march=x86 |  FileCheck %s
 
 
 define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll
index 0d21b49ad77..7ee6de2ff51 100644
--- a/test/CodeGen/X86/widen_load-0.ll
+++ b/test/CodeGen/X86/widen_load-0.ll
@@ -4,15 +4,15 @@
 
 ; Both loads should happen before either store.
 
-; CHECK: movd  (%rsi), {{.*}}
-; CHECK: movd  (%rdi), {{.*}}
-; CHECK: movd  {{.*}}, (%rdi)
-; CHECK: movd  {{.*}}, (%rsi)
+; CHECK: movd  ({{.*}}), {{.*}}
+; CHECK: movd  ({{.*}}), {{.*}}
+; CHECK: movd  {{.*}}, ({{.*}})
+; CHECK: movd  {{.*}}, ({{.*}})
 
-; WIN64: movd  (%rdx), {{.*}}
-; WIN64: movd  (%rcx), {{.*}}
-; WIN64: movd  {{.*}}, (%rcx)
-; WIN64: movd  {{.*}}, (%rdx)
+; WIN64: movd  ({{.*}}), {{.*}}
+; WIN64: movd  ({{.*}}), {{.*}}
+; WIN64: movd  {{.*}}, ({{.*}})
+; WIN64: movd  {{.*}}, ({{.*}})
 
 define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind {
 entry: