[GlobalISel] More fix for the size vs. type typo. NFC.

I missed those in my previous commit (r290378).

llvm-svn: 290387

lib/CodeGen/MIRParser/MIParser.cpp

@@ -1042,12 +1042,12 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest,
 
     MRI.setType(Reg, Ty);
   } else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
-    // Generic virtual registers must have a size.
-    // If we end up here this means the size hasn't been specified and
+    // Generic virtual registers must have a type.
+    // If we end up here this means the type hasn't been specified and
     // this is bad!
     if (RegInfo->Kind == VRegInfo::GENERIC ||
         RegInfo->Kind == VRegInfo::REGBANK)
-      return error("generic virtual registers must have a size");
+      return error("generic virtual registers must have a type");
   }
   Dest = MachineOperand::CreateReg(
       Reg, Flags & RegState::Define, Flags & RegState::Implicit,

lib/CodeGen/MachineVerifier.cpp

@@ -1023,7 +1023,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
             return;
           }
 
-          // The gvreg must have a size and it must not have a SubIdx.
+          // The gvreg must have a type and it must not have a SubIdx.
           LLT Ty = MRI->getType(Reg);
           if (!Ty.isValid()) {
             report("Generic virtual register must have a valid type", MO,

test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir

@@ -15,7 +15,7 @@ registers:
 body: |
   bb.0:
     liveins: %w0
-    ; ERR: generic virtual registers must have a size
+    ; ERR: generic virtual registers must have a type
     ; ERR-NEXT: %0
     ; ERR: Unable to initialize machine function
     %0 = G_ADD i32 %w0, %w0

test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir

@@ -16,7 +16,7 @@ registers:
 body: |
   bb.0:
     liveins: %w0
-    ; ERR: generic virtual registers must have a size
+    ; ERR: generic virtual registers must have a type
     ; ERR-NEXT: %0
     ; ERR: Unable to initialize machine function
     %0 = G_ADD i32 %w0, %w0