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[GlobalISel] More fix for the size vs. type typo. NFC.

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I missed those in my previous commit (r290378).

llvm-svn: 290387
This commit is contained in:
Quentin Colombet 2016-12-22 22:50:34 +00:00
parent d86733cb2e
commit eec78653c8
4 changed files with 6 additions and 6 deletions
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6
lib/CodeGen/MIRParser/MIParser.cpp
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@ -1042,12 +1042,12 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest,
MRI.setType(Reg, Ty); MRI.setType(Reg, Ty);
} else if (TargetRegisterInfo::isVirtualRegister(Reg)) { } else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
// Generic virtual registers must have a size. // Generic virtual registers must have a type.
// If we end up here this means the size hasn't been specified and // If we end up here this means the type hasn't been specified and
// this is bad! // this is bad!
if (RegInfo->Kind == VRegInfo::GENERIC || if (RegInfo->Kind == VRegInfo::GENERIC ||
RegInfo->Kind == VRegInfo::REGBANK) RegInfo->Kind == VRegInfo::REGBANK)
return error("generic virtual registers must have a size"); return error("generic virtual registers must have a type");
} }
Dest = MachineOperand::CreateReg( Dest = MachineOperand::CreateReg(
Reg, Flags & RegState::Define, Flags & RegState::Implicit, Reg, Flags & RegState::Define, Flags & RegState::Implicit,

2
lib/CodeGen/MachineVerifier.cpp
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@ -1023,7 +1023,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
return; return;
} }
// The gvreg must have a size and it must not have a SubIdx. // The gvreg must have a type and it must not have a SubIdx.
LLT Ty = MRI->getType(Reg); LLT Ty = MRI->getType(Reg);
if (!Ty.isValid()) { if (!Ty.isValid()) {
report("Generic virtual register must have a valid type", MO, report("Generic virtual register must have a valid type", MO,

2
test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
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@ -15,7 +15,7 @@ registers:
body: | body: |
bb.0: bb.0:
liveins: %w0 liveins: %w0
; ERR: generic virtual registers must have a size ; ERR: generic virtual registers must have a type
; ERR-NEXT: %0 ; ERR-NEXT: %0
; ERR: Unable to initialize machine function ; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0 %0 = G_ADD i32 %w0, %w0

2
test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
View File

@ -16,7 +16,7 @@ registers:
body: | body: |
bb.0: bb.0:
liveins: %w0 liveins: %w0
; ERR: generic virtual registers must have a size ; ERR: generic virtual registers must have a type
; ERR-NEXT: %0 ; ERR-NEXT: %0
; ERR: Unable to initialize machine function ; ERR: Unable to initialize machine function
%0 = G_ADD i32 %w0, %w0 %0 = G_ADD i32 %w0, %w0