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add support for calling functions that have double arguments

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llvm-svn: 30765
This commit is contained in:
Rafael Espindola 2006-10-06 12:50:22 +00:00
parent 9ce3d493f0
commit f679bdf121
2 changed files with 30 additions and 9 deletions
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29
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -265,16 +265,31 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
// and flag operands which copy the outgoing args into the appropriate regs. // and flag operands which copy the outgoing args into the appropriate regs.
SDOperand InFlag; SDOperand InFlag;
for (unsigned i = 0, e = Layout.lastRegArg(); i <= e; ++i) { for (unsigned i = 0, e = Layout.lastRegArg(); i <= e; ++i) {
SDOperand Arg = Op.getOperand(5+2*i); SDOperand Arg = Op.getOperand(5+2*i);
unsigned Reg = regs[Layout.getRegisterNum(i)]; unsigned RegNum = Layout.getRegisterNum(i);
assert(Layout.getType(i) == Arg.getValueType()); unsigned Reg1 = regs[RegNum];
assert(Layout.getType(i) == MVT::i32); MVT::ValueType VT = Layout.getType(i);
Chain = DAG.getCopyToReg(Chain, Reg, Arg, InFlag); assert(VT == Arg.getValueType());
InFlag = Chain.getValue(1); assert(VT == MVT::i32 || VT == MVT::f32 || VT == MVT::f64);
// Add argument register to the end of the list so that it is known live // Add argument register to the end of the list so that it is known live
// into the call. // into the call.
Ops.push_back(DAG.getRegister(Reg, Arg.getValueType())); Ops.push_back(DAG.getRegister(Reg1, MVT::i32));
if (VT == MVT::f64) {
unsigned Reg2 = regs[RegNum + 1];
SDOperand SDReg1 = DAG.getRegister(Reg1, MVT::i32);
SDOperand SDReg2 = DAG.getRegister(Reg2, MVT::i32);
Ops.push_back(DAG.getRegister(Reg2, MVT::i32));
SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Flag);
SDOperand Ops[] = {Chain, SDReg1, SDReg2, Arg}; //missing flag
Chain = DAG.getNode(ARMISD::FMRRD, VTs, Ops, 4);
} else {
if (VT == MVT::f32)
Arg = DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Arg);
Chain = DAG.getCopyToReg(Chain, Reg1, Arg, InFlag);
}
InFlag = Chain.getValue(1);
} }
std::vector<MVT::ValueType> NodeTys; std::vector<MVT::ValueType> NodeTys;

10
test/Regression/CodeGen/ARM/fp.ll
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@ -3,8 +3,8 @@
; RUN: llvm-as < %s | llc -march=arm | grep fsitos && ; RUN: llvm-as < %s | llc -march=arm | grep fsitos &&
; RUN: llvm-as < %s | llc -march=arm | grep fmrs && ; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
; RUN: llvm-as < %s | llc -march=arm | grep fsitod && ; RUN: llvm-as < %s | llc -march=arm | grep fsitod &&
; RUN: llvm-as < %s | llc -march=arm | grep fmrrd | wc -l | grep 2 && ; RUN: llvm-as < %s | llc -march=arm | grep fmrrd | wc -l | grep 3 &&
; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 1 && ; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 2 &&
; RUN: llvm-as < %s | llc -march=arm | grep flds && ; RUN: llvm-as < %s | llc -march=arm | grep flds &&
; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216" ; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
@ -28,3 +28,9 @@ entry:
double %f2(double %a) { double %f2(double %a) {
ret double %a ret double %a
} }
void %f3(double %a) {
call void %f4( double %a)
ret void
}
declare void %f4(double)