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[X86] cleanup inline asm register generation. NFCI.
llvm-svn: 354042
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@ -43209,20 +43209,20 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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if (Size == 64 && !is64Bit) {
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// Model GCC's behavior here and select a fixed pair of 32-bit
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// registers.
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switch (Res.first) {
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case X86::EAX:
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switch (DestReg) {
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case X86::RAX:
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return std::make_pair(X86::EAX, &X86::GR32_ADRegClass);
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case X86::EDX:
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case X86::RDX:
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return std::make_pair(X86::EDX, &X86::GR32_DCRegClass);
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case X86::ECX:
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case X86::RCX:
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return std::make_pair(X86::ECX, &X86::GR32_CBRegClass);
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case X86::EBX:
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case X86::RBX:
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return std::make_pair(X86::EBX, &X86::GR32_BSIRegClass);
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case X86::ESI:
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case X86::RSI:
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return std::make_pair(X86::ESI, &X86::GR32_SIDIRegClass);
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case X86::EDI:
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case X86::RDI:
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return std::make_pair(X86::EDI, &X86::GR32_DIBPRegClass);
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case X86::EBP:
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case X86::RBP:
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return std::make_pair(X86::EBP, &X86::GR32_BPSPRegClass);
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default:
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return std::make_pair(0, nullptr);
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