Commit Graph

72709 Commits

Author SHA1 Message Date
Rafael Espindola
06c8318a60 Dwarf register 0 is r0, remove incorrect entries.
llvm-svn: 132276
2011-05-29 03:17:01 +00:00
John McCall
233946583f Fix this to work correctly with phis; test case to follow if this successfully
fixes self-host.

llvm-svn: 132275
2011-05-29 03:01:09 +00:00
Rafael Espindola
51a8fe13bc Remove the dwarf numbers from the D registers. They don't have dwarf numbers
and should probably be encoded as

DW_OP_reg 32 DW_OP_piece 4 DW_OP_reg 33

llvm-svn: 132274
2011-05-29 02:21:01 +00:00
Cameron Zwarich
72e034c331 Fix ARM fast isel to correctly flag memory operands to stores. This fixes
-verify-machineinstrs failures on several tests.

llvm-svn: 132268
2011-05-28 20:34:49 +00:00
Nadav Rotem
63c8747adf Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).

llvm-svn: 132263
2011-05-28 17:57:14 +00:00
Benjamin Kramer
ffcbcb72ef Erase instructions _after_ checking their type.
llvm-svn: 132256
2011-05-28 11:48:37 +00:00
Benjamin Kramer
ad67c34014 Move ARM specific test into the ARM subdir.
llvm-svn: 132255
2011-05-28 11:01:30 +00:00
Benjamin Kramer
129192d295 ConstantFoldInstOperands doesn't like compares, hand it off to instsimplify instead.
Fixes PR10040.

llvm-svn: 132254
2011-05-28 10:16:58 +00:00
John McCall
119a0222f5 Implement and document the llvm.eh.resume intrinsic, which is
transformed by the inliner into a branch to the enclosing landing pad
(when inlined through an invoke).  If not so optimized, it is lowered
DWARF EH preparation into a call to _Unwind_Resume (or _Unwind_SjLj_Resume
as appropriate).  Its chief advantage is that it takes both the
exception value and the selector value as arguments, meaning that there
is zero effort in recovering these;  however, the frontend is required
to pass these down, which is not actually particularly difficult.

Also document the behavior of landing pads a bit better, and make it
clearer that it's okay that personality functions don't always land at
landing pads.  This is just a fact of life.  Don't write optimizations that
rely on pushing things over an unwind edge.

llvm-svn: 132253
2011-05-28 07:45:59 +00:00
John McCall
fd85fdee7c Change how tblgen generates attributes for intrinsics to use a single
switch.  With this newfound organization, teach tblgen how not to give
all intrinsics the 'nounwind' attribute.  Introduce a new intrinsic,
llvm.eh.resume, which does not have this attribute.  Documentation and uses
to follow.

llvm-svn: 132252
2011-05-28 06:31:34 +00:00
Charles Davis
6702c786ed When generating code for Win64 EH, emit StartProc and EndProc directives.
llvm-svn: 132250
2011-05-28 04:21:04 +00:00
Bruno Cardoso Lopes
6d5e369a10 Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
2011-05-28 04:07:29 +00:00
Eric Christopher
a2fa6edef9 This actually starts at offset 0, not 1.
llvm-svn: 132246
2011-05-28 03:16:22 +00:00
Jakob Stoklund Olesen
56bd697f79 Create two BlockInfo entries when a live range is discontinuous through a block.
Delete the Kill and Def markers in BlockInfo. They are no longer
necessary when BlockInfo describes a continuous live range.

This only affects the relatively rare kind of basic block where a live
range looks like this:

 |---x   o---|

Now live range splitting can pretend that it is looking at two blocks:

 |---x
         o---|

This allows the code to be simplified a bit.

llvm-svn: 132245
2011-05-28 02:33:00 +00:00
Jakob Stoklund Olesen
394d198d2e Add SplitAnalysis::getNumLiveBlocks().
It is important that this function returns the same number of live blocks as
countLiveBlocks(CurLI) because live range splitting uses the number of live
blocks to ensure it is making progress.

This is in preparation of supporting duplicate UseBlock entries for basic blocks
that have a virtual register live-in and live-out, but not live-though.

llvm-svn: 132244
2011-05-28 02:32:57 +00:00
Akira Hatanaka
45b3f52c41 Change the set of callee-saved registers for non-MIPS32 architectures specified
in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a
double precision register get saved.

 

llvm-svn: 132243
2011-05-28 01:41:05 +00:00
Eric Christopher
000dd7d0e6 Implement the 'M' output modifier for arm inline asm. This is fairly
register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.

rdar://9119939

llvm-svn: 132242
2011-05-28 01:40:44 +00:00
Chad Rosier
d0a64ab2af Add missing newlines.
llvm-svn: 132241
2011-05-28 01:35:58 +00:00
Akira Hatanaka
1590e4eab1 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Devang Patel
93e78e996f Select DW_AT_const_value size based on global variable size.
llvm-svn: 132239
2011-05-28 00:39:18 +00:00
Rafael Espindola
707fa44bc0 Add 132187 back now that the real problem is fixed.
llvm-svn: 132238
2011-05-28 00:24:37 +00:00
Chad Rosier
fbc91cd006 Fix test cases that were previously using grep to use FileCheck
llvm-svn: 132237
2011-05-28 00:15:10 +00:00
Rafael Espindola
386c4259db Fix the root cause of the bootstrap failure:
There was no way to check if a given register/mode pair was valid. We now return
an error code (-2) instead of asserting. If anyone thinks that an assert
at this point  is really needed, we can autogen a hasValidDwarfRegNum instead.

llvm-svn: 132236
2011-05-28 00:13:01 +00:00
Cameron Zwarich
cd3c1b5829 Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
and add some basic tests for them.

llvm-svn: 132235
2011-05-27 23:54:00 +00:00
Charles Davis
cf8d922dbe Stub out support for Win64-style exceptions. Note that this is merely using
the Win64 EH mechanism to implement GCC-style exceptions. LLVM supports
hardly anything else at this point!

llvm-svn: 132234
2011-05-27 23:47:32 +00:00
Bruno Cardoso Lopes
93eae0fd19 ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
2011-05-27 23:46:09 +00:00
Rafael Espindola
8ed6285c8d It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check.
llvm-svn: 132230
2011-05-27 23:36:02 +00:00
Eli Friedman
a64ba39381 Force a triple to make this test pass on Darwin.
llvm-svn: 132228
2011-05-27 23:12:48 +00:00
Chad Rosier
a4732c4a96 Clean out the 2.9 Release Notes. Mostly limited to What's New in LLVM
and enhancements in sub-project status updates.

llvm-svn: 132227
2011-05-27 22:50:46 +00:00
Cameron Zwarich
ded03d4e24 Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.

llvm-svn: 132225
2011-05-27 22:26:04 +00:00
Rafael Espindola
9ce5cebde6 Fix a regression I recently introduced by removing DwarfRegNum of
subregisters:

When a value is in a subregister, at least report the location as being
the superregister. We should extend the .td files to encode the bit
range so that we can produce a DW_OP_bit_piece.

llvm-svn: 132224
2011-05-27 22:15:01 +00:00
Rafael Espindola
2230168a0f Make size computation less brittle.
llvm-svn: 132222
2011-05-27 22:05:41 +00:00
Charles Davis
cb20ea9935 Add the suffix to the Win64 EH data sections' names if given. Add a test for
this. XFAIL'd, because the COFF AsmParser can't handle .section yet.

llvm-svn: 132220
2011-05-27 21:38:47 +00:00
Nadav Rotem
531aa71d22 Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place. Re-apply 131534 and fix the multi-step promotion of integers.

llvm-svn: 132217
2011-05-27 21:03:13 +00:00
Eli Friedman
fe707571fc Attempt to preserve debug line info in LICM; as the comment in the code says, it's hard to pick good line numbers for this transformation, but something is better than nothing.
rdar://9143729

llvm-svn: 132215
2011-05-27 20:31:51 +00:00
Chad Rosier
336767fc2a Typo is test case
llvm-svn: 132214
2011-05-27 20:16:57 +00:00
Jakob Stoklund Olesen
516eb93107 Make room for register allocation to improve.
llvm-svn: 132213
2011-05-27 20:15:06 +00:00
Chad Rosier
fe86df1e51 Add change of crc32 intrinsic to release notes
llvm-svn: 132212
2011-05-27 20:13:10 +00:00
Evan Cheng
0fcb465bab Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
llvm-svn: 132211
2011-05-27 20:11:27 +00:00
Jakob Stoklund Olesen
fb206b98bd Delete a test that is no longer relevant.
According to PR2536, the old spiller had trouble with the IMPLICIT_DEF in this
code:

  %reg1028<def> = MOV16rm %reg0, 1, %reg0, <ga:g_5>, Mem:LD(2,2) [g_5 + 0]
  %reg1039<def> = IMPLICIT_DEF
  %reg1038<def> = INSERT_SUBREG %reg1039, %reg1028, 2
  %reg1025<def> = AND32ri %reg1038, 65534, %%EFLAGS<imp-def>

However, today we emit a zero-extending load instead:

  %vreg10<def> = MOVZX32rm16 %noreg, 1, %noreg, <ga:@g_5>, %noreg; %mem:LD2[@g_5] GR32:%vreg10
  %vreg0<def> = AND32ri %vreg10, 65534, %%EFLAGS<imp-def,dead>; %GR32:%vreg0,%vreg10

This makes the test pointless since it no longer creates the spiller hazard.

llvm-svn: 132210
2011-05-27 20:02:42 +00:00
Chad Rosier
f2b2b472cc CRC32 intrinsics were renamed at revision 132163. This submission
fixes aliasing issues with the old and new names as well as adds test
cases for the auto-upgrader.
Fixes rdar 9472944.

llvm-svn: 132207
2011-05-27 19:38:10 +00:00
Devang Patel
2872ac051d Keep this simple. Use DIType to get signness and size of a type. Based on size, select appropraite form.
llvm-svn: 132206
2011-05-27 19:13:26 +00:00
Charles Davis
f835c87c83 Add a parameter to the Win64 EH section getters to get a section with a
suffix (e.g. .xdata$myfunc). The suffix part isn't implemented yet, but
I'll get to it in the next patch.

Fix up all callers of the affected functions. Make them pass said suffix to
the function.

llvm-svn: 132205
2011-05-27 19:09:24 +00:00
Evan Cheng
4192d53d1e Add iOS test
llvm-svn: 132203
2011-05-27 19:04:21 +00:00
Dan Gohman
20949164a3 Update this comment.
llvm-svn: 132202
2011-05-27 18:42:33 +00:00
Eli Friedman
1062ba1e1f Don't sink or hoist debug info instrinsics; it isn't useful. This also prevents LICM sinking from erasing debug intrinsics which don't dominate any exit block of the loop.
rdar://9143943 .

llvm-svn: 132201
2011-05-27 18:37:52 +00:00
John McCall
2f479c4d42 Fix the inliner to maintain the current de facto invoke semantics:
- the selector for the landing pad must provide all available information
    about the handlers, filters, and cleanups within that landing pad
  - calls to _Unwind_Resume must be converted to branches to the enclosing
    lpad so as to avoid re-entering the unwinder when the lpad claimed it
    was going to handle the exception in some way
This is quite specific to libUnwind-based unwinding.  In an effort to not
interfere too badly with other unwinders, and with existing hacks in frontends,
this only triggers on _Unwind_Resume (not _Unwind_Resume_or_Rethrow) and does
nothing with selectors if it cannot find a selector call for either lpad.

llvm-svn: 132200
2011-05-27 18:34:38 +00:00
Jakob Stoklund Olesen
021b1ff0c7 Delete MethodBodies that only filtered reserved registers.
The register allocators know to filter reserved registers from the allocation
orders, so we don't need all of this boilerplate.

llvm-svn: 132199
2011-05-27 18:27:13 +00:00
Devang Patel
c0bffe6366 Handle signed types gracefully.
This fixes regressions reported by buildbots as a fallout of r132193.

llvm-svn: 132197
2011-05-27 18:15:52 +00:00
Eli Friedman
55343ef7bb And fix the test in r132194.
llvm-svn: 132196
2011-05-27 18:14:28 +00:00