169320 Commits

Author SHA1 Message Date
Alex Bradbury
b1a1176161 [RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A
Introduce a new RISCVExpandPseudoInsts pass to expand atomic 
pseudo-instructions after register allocation. This is necessary in order to 
ensure that register spills aren't introduced between LL and SC, thus breaking 
the forward progress guarantee for the operation. AArch64 does something 
similar for CmpXchg (though only at O0), and Mips is moving towards this 
approach (see D31287). See also [this mailing list 
post](http://lists.llvm.org/pipermail/llvm-dev/2016-May/099490.html) from 
James Knight, which summarises the issues with lowering to ll/sc in IR or 
pre-RA.

See the [accompanying RFC 
thread](http://lists.llvm.org/pipermail/llvm-dev/2018-June/123993.html) for an 
overview of the lowering strategy.

Differential Revision: https://reviews.llvm.org/D47882

llvm-svn: 342534
2018-09-19 10:54:22 +00:00
Hans Wennborg
9664784f3d [COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables
The 0x800 bit in @feat.00 needs to be set in order to make LLD pick up
the .gfid$y table. I believe this is fine to set even if we don't emit
the instrumentation.

We haven't emitted @feat.00 on 64-bit before. I see that MSVC does emit
it, but I'm not entirely sure what the default value should be. I went
with zero since that seems as safe as not emitting the symbol in the
first place.

Differential Revision: https://reviews.llvm.org/D52235

llvm-svn: 342532
2018-09-19 09:58:30 +00:00
Simon Pilgrim
dd44883655 [X86][SSE] Update extractelement test in preparation for D52140
SimplifyDemandedVectorEltsForTargetNode will remove most of this test unless get rid of the undefs - still testing for align 1 which was the point of the test

Removed out of date comment as well

llvm-svn: 342531
2018-09-19 09:50:32 +00:00
Carlos Alberto Enciso
2085f61d99 [DebugInfo][Dexter] Speculated BB presents illegal variable value to debugger.
When SimplifyCFG changes the PHI node into a select instruction, the debug information becomes ambiguous. It causes the debugger to display wrong variable value. 

Differential Revision: https://reviews.llvm.org/D51976

llvm-svn: 342527
2018-09-19 08:16:56 +00:00
Jonas Devlieghere
179d7c06a6 [DWARF Verifier] Add helper function to dump DIEs. [NFC]
It's pretty common for the verifier to dump the relevant DIE when it
finds an issue. This tends to be relatively verbose and error prone
because we have to pass the DIDumpOptions to the DIE's dump method. This
patch adds a helper function to the verifier to make this easier.

llvm-svn: 342526
2018-09-19 08:08:13 +00:00
Thomas Lively
21f4faec60 [WebAssembly][NFC] Remove extra space in WebAssemblyInstrSIMD.td
llvm-svn: 342522
2018-09-19 00:54:20 +00:00
Matthias Braun
a36913825c AArch64MacroFusion: Factor out some opcode handling code; NFC
llvm-svn: 342521
2018-09-19 00:23:37 +00:00
Matthias Braun
9728bec113 ScheduleDAG: Cleanup dumping code; NFC
- Instead of having both `SUnit::dump(ScheduleDAG*)` and
  `ScheduleDAG::dumpNode(ScheduleDAG*)`, just keep the latter around.
- Add `ScheduleDAG::dump()` and avoid code duplication in several
  places. Implement it for different ScheduleDAG variants.
- Add `ScheduleDAG::dumpNodeName()` in favor of the `SUnit::print()`
  functions. They were only ever used for debug dumping and putting the
  function into ScheduleDAG is consistent with the `dumpNode()` change.

llvm-svn: 342520
2018-09-19 00:23:35 +00:00
Dean Michael Berris
4a3b31cfb1 [XRay][compiler-rt] FDRLogWriter Abstraction
Summary:
This change introduces an `FDRLogWriter` type which is responsible for
serialising metadata and function records to character buffers. This is
the first step in a refactoring of the implementation of the FDR runtime
to allow for more granular testing of the individual components of the
implementation.

The main contribution of this change is a means of hiding the details of
how specific records are written to a buffer, and for managing the
extents of these buffers. We make use of C++ features (templates and
some metaprogramming) to reduce repetition in the act of writing out
specific kinds of records to the buffer.

In this process, we make a number of changes across both LLVM and
compiler-rt to allow us to use the `Trace` abstraction defined in the
LLVM project in the testing of the runtime implementation. This gives us
a closer end-to-end test which version-locks the runtime implementation
with the loading implementation in LLVM.

We also allow using gmock in compiler-rt unit tests, by adding the
requisite definitions in the `AddCompilerRT.cmake` module.

Finally, we've gone ahead and updated the FDR logging implementation to
use the FDRLogWriter for the lowest-level record-writing details.

Following patches will isolate the state machine transitions which
manage the set-up and tear-down of the buffers we're using in multiple
threads.

Reviewers: mboerger, eizan

Subscribers: mgorny, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D52220

llvm-svn: 342518
2018-09-18 23:59:32 +00:00
Thomas Lively
13667b2d1a [WebAssembly] v4f32.abs and v2f64.abs
Summary: implement lowering of @llvm.fabs for vector types.

Reviewers: aheejin, dschuff

Subscribers:

llvm-svn: 342513
2018-09-18 21:45:12 +00:00
Douglas Yung
6c33bef4a5 Revert r342494 as it was failing on a bot and the author cannot look at it until tomorrow.
Failing bot: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/36708

llvm-svn: 342509
2018-09-18 19:34:05 +00:00
Martin Storsjo
2791c40337 [benchmark] Mention another cherry-picked change in README.LLVM. NFC.
This was cherry-picked in SVN r342450.

llvm-svn: 342506
2018-09-18 19:31:09 +00:00
Don Hinton
6c50f7113c [bugpoint] Revert r318459
Summary: Revert r318459 which introduced a TempFile scoping bug.

Differential Revision: https://reviews.llvm.org/D51836

llvm-svn: 342503
2018-09-18 18:39:27 +00:00
Kristina Brooks
79e13b3973 Remove svn:executable from a documentation file.
Should fix the buildbot failure caused by it.

llvm-svn: 342502
2018-09-18 18:37:16 +00:00
Kristina Brooks
ed0109da57 [Docs] [Support] System Library to Support Library transition along with minor corrections to reflect it.
System Library has been a long deprecated term along with the path lib/System, having been superseded/renamed
to the Support Library a long time ago. These patches reflect those changes in documentation as well as
update some outdated examples and provide context to the origin of the Support Library.

Differential Revision: https://reviews.llvm.org/D52107

llvm-svn: 342500
2018-09-18 18:05:38 +00:00
Christy Lee
b9b32ee54d Do not optimize atomic load to non-atomic memcmp
Differential Revision: https://reviews.llvm.org/D51998

llvm-svn: 342498
2018-09-18 17:02:42 +00:00
Farhana Aleen
e21b072309 [AMDGPU] Match udot8 pattern
Summary: D.u32 = S0.u4[0] * S1.u4[0] +

         S0.u4[1] * S1.u4[1] +
         S0.u4[2] * S1.u4[2] +
         S0.u4[3] * S1.u4[3] +
         S0.u4[4] * S1.u4[4] +
         S0.u4[5] * S1.u4[5] +
         S0.u4[6] * S1.u4[6] +
         S0.u4[7] * S1.u4[7] +
         S2.u32

Author: FarhanaAleen

Reviewed By: arsenm, nhaehnle

Differential Revision: https://reviews.llvm.org/D51947

llvm-svn: 342497
2018-09-18 16:59:48 +00:00
Zachary Turner
b7d416281f Fix function signature to actually be an override.
llvm-svn: 342496
2018-09-18 16:58:17 +00:00
Hiroshi Yamauchi
1b64744d08 [PGO][CHR] Add opt remarks.
Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52056

llvm-svn: 342495
2018-09-18 16:50:10 +00:00
Christy Lee
6e655307af Check lines before using alias analysis to check for interference
This diff is to show the difference before and after D51550

Differential Revision: https://reviews.llvm.org/D52044

llvm-svn: 342494
2018-09-18 16:43:44 +00:00
Zachary Turner
2899786ed4 [PDB] Better support for enumerating pointer types.
There were several issues with the previous implementation.

1) There were no tests.
2) We didn't support creating PDBSymbolTypePointer records for
   builtin types since those aren't described by LF_POINTER
   records.
3) We didn't support a wide enough variety of builtin types even
   ignoring pointers.

This patch fixes all of these issues.  In order to add tests,
it's helpful to be able to ignore the symbol index id hierarchy
because it makes the golden output from the DIA version not match
our output, so I've extended the dumper to disable dumping of id
fields.

llvm-svn: 342493
2018-09-18 16:35:05 +00:00
Krzysztof Parzyszek
1da2828aba [PostRASink] Make sure to remove subregisters from live-ins as well
llvm-svn: 342492
2018-09-18 16:10:51 +00:00
Jinsong Ji
22e74b4590 [NFC] Update comments regarding BufferSize for ProcResources
llvm-svn: 342491
2018-09-18 15:38:56 +00:00
Simon Pilgrim
f1d39b6431 Revert rL342465: Added function to set a register to a particular value + tests.
rL342465 is breaking the MSVC buildbots.

llvm-svn: 342490
2018-09-18 15:38:16 +00:00
Simon Pilgrim
5064dc23e2 Revert rL342466: [llvm-exegesis] Improve Register Setup.
rL342465 is breaking the MSVC buildbots, but I need to revert this dependent revision as well.

Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342489
2018-09-18 15:35:49 +00:00
Alex Bradbury
7cbd1e08a6 [RISCV][MC] Use a custom ParserMethod for the bare_symbol operand type
This allows the hard-coded shouldForceImmediate logic to be removed because 
the generated MatchOperandParserImpl makes use of the current context (i.e. 
the current mnemonic) to determine parsing behaviour, and so won't first try 
to parse a register before parsing a symbol name.

No functional change is intended. gas accepts immediate arguments for call, 
tail and lla. This patch doesn't address this discrepancy.

Differential Revision: https://reviews.llvm.org/D51733

llvm-svn: 342488
2018-09-18 15:18:16 +00:00
Alex Bradbury
b3265dc2cf [RISCV][MC] Reject bare symbols for the simm12 operand type
addi a0, a0, foo and lw a0, foo(a0) and similar are now rejected. An explicit 
%lo and %pcrel_lo modifier is required. This matches gas behaviour.

llvm-svn: 342487
2018-09-18 15:13:29 +00:00
Alex Bradbury
101707113f [RISCV][MC] Tighten up checking of sybol operands to lui and auipc
Reject bare symbols and accept only %pcrel_hi(sym) for auipc and %hi(sym) for 
lui. Also test valid operand modifiers in rv32i-valid.s.

Note this is slightly stricter than gas, which will accept either %pcrel_hi or 
%hi for both lui and auipc.

Differential Revision: https://reviews.llvm.org/D51731

llvm-svn: 342486
2018-09-18 15:08:35 +00:00
Nico Weber
ac548ddb6a Remove dead function user_cache_directory()
It's been unused since it was added almost 3 years ago in
https://reviews.llvm.org/D13801

Motivated by https://reviews.llvm.org/rL342002 since it removes one of the
functions keeping a ref to SHGetKnownFolderPath.

Differential Revision: https://reviews.llvm.org/D52184

llvm-svn: 342485
2018-09-18 15:06:16 +00:00
Andrea Di Biagio
bbff24bad4 [llvm-mca] Add the ability to mark register reads/writes associated with dep-breaking instructions. NFCI
This patch adds two new boolean fields:
  - Field `ReadState::IndependentFromDef`.
  - Field `WriteState::WritesZero`.

Field `IndependentFromDef` is set for ReadState objects associated with
dependency-breaking instructions. It is used by the simulator when updating data
dependencies between registers.

Field `WritesZero` is set by WriteState objects associated with dependency
breaking zero-idiom instructions. It helps the PRF identify which writes don't
consume any physical registers.

llvm-svn: 342483
2018-09-18 15:00:06 +00:00
Hans Wennborg
a0f99a5a16 Revert r342457 "Fixes removal of dead elements from PressureDiff (PR37252)."
This broke the lit tests on a bunch of buildbots, e.g.
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/36679

> Reviewed By: MatzeB
>
> Differential Revision: https://reviews.llvm.org/D51495

llvm-svn: 342482
2018-09-18 14:12:54 +00:00
Simon Pilgrim
db12a22bab Use pass-by-reference for-range loop. NFCI.
llvm-svn: 342481
2018-09-18 14:05:07 +00:00
Andrea Di Biagio
22165a157e [llvm-mca] Slightly refactor class InstRef. NFC.
llvm-svn: 342480
2018-09-18 14:03:46 +00:00
Teresa Johnson
4c2b238d91 [ThinLTO] Update LangRef doc for summary parsing
Summary:
Remove note about summary being ignored. Update to reflect the
fact that summary is now parsed by llvm-as.

While here, fix one summary format that changed since the initial
implementation.

Reviewers: dexonsmith

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D51540

llvm-svn: 342479
2018-09-18 13:44:13 +00:00
Nemanja Ivanovic
2d74f410d9 [PowerPC] Do not emit record-form rotates when record-form andi/andis suffices
This is a follow-up to the previous patch that eliminated some of the rotates.
With this addition, we will also emit the record-form andis.

This patch increases the number of record-form rotates we eliminate by
more than 70%.

Differential revision: https://reviews.llvm.org/D44897

llvm-svn: 342478
2018-09-18 13:43:16 +00:00
Teresa Johnson
a59795bace [LTO] Make detection of WPD remark enablement more robust
Summary:
Currently only the first function in the module is checked to
see if it has remarks enabled. If that first function is a declaration,
remarks will be incorrectly skipped. Change to look for the first
non-empty function.

Reviewers: pcc

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D51556

llvm-svn: 342477
2018-09-18 13:42:24 +00:00
whitequark
442e076ce3 [LLVM-C][OCaml] Add UnifyFunctionExitNodes pass to C and OCaml APIs
Summary:
Adds LLVMAddUnifyFunctionExitNodesPass to expose
createUnifyFunctionExitNodesPass to the C and OCaml APIs.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52212

llvm-svn: 342476
2018-09-18 13:36:03 +00:00
whitequark
0d2f668e5a [LLVM-C][OCaml] Add LowerAtomic pass to C and OCaml APIs
Summary:
Adds LLVMAddLowerAtomicPass to expose createLowerAtomicPass in the C
and OCaml APIs.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D52211

llvm-svn: 342475
2018-09-18 13:35:50 +00:00
whitequark
1598b84403 [OCaml] Add OCaml API for LLVMGetIndices
Summary:
This patch adds a thin wrapper around LLVMGetNumIndices and
LLVMGetIndices to return the indices of ExtractValue or InsertValue
instructions as an OCaml array. It has not seemed to be necessary to
expose LLVMGetNumIndices separately.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52207

llvm-svn: 342474
2018-09-18 13:35:39 +00:00
Nemanja Ivanovic
7b9800b7a6 [PowerPC] Optimize compares fed by ANDISo
Both ANDIo and ANDISo (and the 64-bit versions) are record-form instructions.
When optimizing compares, we handle the former in order to eliminate the compare
instruction but not the latter. This patch just adds the latter to the set of
instructions we optimize.
The reason these instructions need to be handled separately is that they are not
part of the RecFormRel map (since they don't have a non-record-form). The
missing "and-immediate-shifted" is just an oversight in the initial
implementation.

Differential revision: https://reviews.llvm.org/D51353

llvm-svn: 342472
2018-09-18 13:21:58 +00:00
John Brawn
6272ef4ab8 [TargetLowering] Android has sincos functions
Since Android API version 9 the Android libm has had the sincos functions, so
they should be recognised as libcalls and sincos optimisation should be applied.

Differential Revision: https://reviews.llvm.org/D52025

llvm-svn: 342471
2018-09-18 13:18:21 +00:00
Simon Pilgrim
98d6c5d768 Fix signed/unsigned comparison warning. NFCI.
llvm-svn: 342469
2018-09-18 12:01:25 +00:00
Simon Pilgrim
960c5ec77f [TableGen] CodeGenDAGPatterns::GenerateVariants - full caching of matching predicates
Further extension to D51035, this patch avoids all repeated predicates[] matching by caching as it collects the patterns that have multiple variants.

Saves around 25secs in debug builds of x86 -gen-dag-isel.

Differential Revision: https://reviews.llvm.org/D51839

llvm-svn: 342467
2018-09-18 11:30:30 +00:00
Guillaume Chatelet
52b299b2e1 [llvm-exegesis] Improve Register Setup.
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342466
2018-09-18 11:26:48 +00:00
Guillaume Chatelet
369049ce40 Added function to set a register to a particular value + tests.
llvm-svn: 342465
2018-09-18 11:26:35 +00:00
Guillaume Chatelet
4107d8cd61 Improve Register Setup
llvm-svn: 342464
2018-09-18 11:26:27 +00:00
Alexander Kornienko
4fd6b65aec Remove trailing whitespace introduced in r342440.
llvm-svn: 342463
2018-09-18 10:53:13 +00:00
Simon Pilgrim
6442f17c49 [X86][SSE] LowerShift - pull out repeated getTargetVShiftUniformOpcode calls. NFCI.
llvm-svn: 342462
2018-09-18 10:44:44 +00:00
David Carlier
3947adc7f0 [Xray] llvm-xray fix possible segfault
top argument when superior to the instrumentated code list capacity can lead to a segfault.

Reviewers: dberris

Reviewed By: dberris

Differential Revision: https://reviews.llvm.org/D52224

llvm-svn: 342461
2018-09-18 10:31:10 +00:00
Yury Gribov
2c6a4f8f98 Fixes removal of dead elements from PressureDiff (PR37252).
Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D51495

llvm-svn: 342457
2018-09-18 09:53:42 +00:00