Commit Graph

4558 Commits

Author SHA1 Message Date
Christopher Lamb
d56318b885 Remove an orthogonal transformation of the selection condition from my most recent submission.
llvm-svn: 45169
2007-12-18 20:30:28 +00:00
Evan Cheng
8824950e8f Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
llvm-svn: 45167
2007-12-18 19:38:14 +00:00
Christopher Lamb
437b4d229e Fix typos.
llvm-svn: 45159
2007-12-18 09:45:40 +00:00
Christopher Lamb
aeb76743dc Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV.
This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll

llvm-svn: 45158
2007-12-18 09:34:41 +00:00
Evan Cheng
36bfae49e3 FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
llvm-svn: 45157
2007-12-18 08:42:10 +00:00
Christopher Lamb
efdf2791b2 Don't forget to print address space qualifiers when printing out the type table! Thanks to Gordon Henriksen for pointing this out.
llvm-svn: 45147
2007-12-18 03:49:35 +00:00
Dale Johannesen
d0377b8eb2 Testcase for preceding FE fix
llvm-svn: 45144
2007-12-18 01:58:38 +00:00
Scott Michel
94d7a2f1f2 i32 immediate constant test case for CellSPU
llvm-svn: 45134
2007-12-17 23:45:52 +00:00
Evan Cheng
d9df071ead Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sure
it's auto-upgraded to a shufflevector instruction.

llvm-svn: 45131
2007-12-17 22:33:23 +00:00
Scott Michel
4f980e1acd - Restore some i8 functionality in CellSPU
- New test case: nand.ll

llvm-svn: 45130
2007-12-17 22:32:34 +00:00
Duncan Sands
3a0d757bd5 Make invokes of inline asm legal. Teach codegen
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).

llvm-svn: 45108
2007-12-17 18:08:19 +00:00
Gordon Henriksen
42edc61320 Disabling a RUN line that's broken until addrspace roundtrips
through llvm-as|llvm-dis.

llvm-svn: 45097
2007-12-17 16:09:28 +00:00
Gordon Henriksen
ef2c27d164 C and Ocaml bindings for address spaces, for that burgeoning market
for Ocaml-based compilers targeting embedded devices. :)

llvm-svn: 45096
2007-12-17 16:08:32 +00:00
Duncan Sands
bf62f62058 Make instcombine promote inline asm calls to 'nounwind'
calls.  Remove special casing of inline asm from the
inliner.  There is a potential problem: the verifier
rejects invokes of inline asm (not sure why).  If an
asm call is not marked "nounwind" in some .ll, and
instcombine is not run, but the inliner is run, then
an illegal module will be created.  This is bad but
I'm not sure what the best approach is.  I'm tempted
to remove the check in the verifier...

llvm-svn: 45073
2007-12-16 15:51:49 +00:00
Evan Cheng
1d95b669b6 Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
llvm-svn: 45058
2007-12-15 03:00:47 +00:00
Scott Michel
307f334014 Start committing working test cases for CellSPU.
llvm-svn: 45050
2007-12-15 00:38:50 +00:00
Duncan Sands
091a505971 Teach the interpreter to read and write memory in the
endianness of the target not of the host.  Done by the
simple expedient of reversing bytes for primitive types
if the host and target endianness don't match.  This is
correct for integer and pointer types.  I don't know if
it is correct for floating point types.

llvm-svn: 45039
2007-12-14 19:38:31 +00:00
Dan Gohman
5290ca3d65 Don't redirect stderr when it isn't needed.
llvm-svn: 45033
2007-12-14 15:15:11 +00:00
Evan Cheng
6909ff8c4b Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.
llvm-svn: 45029
2007-12-14 08:30:15 +00:00
Anders Carlsson
900a684ae7 All MMX shift instructions took a <2 x i32> vector as the shift amount parameter. Change this to be <1 x i64> instead, which matches the assembler instruction.
llvm-svn: 45027
2007-12-14 06:38:54 +00:00
Evan Cheng
51cf86ded0 Implement ctlz and cttz with bsr and bsf.
llvm-svn: 45024
2007-12-14 02:13:44 +00:00
Evan Cheng
a152909956 Be extra careful with extension use optimation. Now turned on by default.
llvm-svn: 44981
2007-12-13 03:32:53 +00:00
Zhou Sheng
8361abb64f Remove this testcase as it will always fail on
platform like Darwin.

llvm-svn: 44977
2007-12-13 02:03:57 +00:00
Evan Cheng
343929c773 Fold some and + shift in x86 addressing mode.
llvm-svn: 44970
2007-12-13 00:43:27 +00:00
Evan Cheng
64a1febf9a Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
Dan Gohman
0075ea1f5f Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
2007-12-12 22:21:26 +00:00
Wojciech Matyjewicz
8bb1d9e67c 1. "Upgrage" comments.
2. Using zero-extended value of Scale and unsigned division is safe provided
   that Scale doesn't have the sign bit set.
   Previously these 2 instructions:
        %p = bitcast [100 x {i8,i8,i8}]* %x to i8*
        %q = getelementptr i8* %p, i32 -4
   were combined into:
        %q = getelementptr [100 x { i8, i8, i8 }]* %x, i32 0,
               i32 1431655764, i32 0
   what was incorrect.

llvm-svn: 44936
2007-12-12 15:21:32 +00:00
Christopher Lamb
6d12d7c0fe Implement part of review feedback for address spaces.
llvm-svn: 44933
2007-12-12 08:44:39 +00:00
Evan Cheng
ad3e7f3286 Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.
llvm-svn: 44929
2007-12-12 07:55:34 +00:00
Evan Cheng
af6ba4dfd4 Add a test case for -optimize-ext-uses.
llvm-svn: 44928
2007-12-12 07:54:08 +00:00
Evan Cheng
d36d69fe92 Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.
llvm-svn: 44921
2007-12-12 06:45:40 +00:00
Zhou Sheng
089df5d640 Fixed PR1629.
Make lli interpreter correctly call external functions sin()/cos(),
__cxa_guard_acquire() and __cxa_guard_release().

llvm-svn: 44910
2007-12-12 04:55:43 +00:00
Gordon Henriksen
3f070cf3b9 Add (very basic) bindings for ModuleProvider.
llvm-svn: 44899
2007-12-12 01:04:30 +00:00
Dan Gohman
b658d65949 Rename these tests to use the appropriate suffixes.
llvm-svn: 44867
2007-12-11 15:55:52 +00:00
Dan Gohman
7867eefd96 Use not instead of ignore when an exit status is expected to always
be non-zero.

llvm-svn: 44866
2007-12-11 15:50:23 +00:00
Dan Gohman
7be70b555b Don't redirect stderr when it isn't needed.
llvm-svn: 44865
2007-12-11 15:41:11 +00:00
Christopher Lamb
7368604860 Implement address space attribute for LLVM pointer types. Address spaces are
regions of memory that have a target specific relationship, as described in the 
Embedded C Technical Report. 

This also implements the 2007-12-11-AddressSpaces test, 
which demonstrates how address space attributes can be used in LLVM IR.

In addition, this patch changes the bitcode signature for stores (in a backwards 
compatible manner), such that the pointer type, rather than the pointee type, is 
encoded. This permits type information in the pointer (e.g. address space) to be 
preserved for stores.

LangRef updates are forthcoming.

llvm-svn: 44858
2007-12-11 08:59:05 +00:00
Chris Lattner
568d56425b Implement constant folding if vector<->vector bitcasts where the number
of source/dest elements changes.  This implements
test/Transforms/InstCombine/bitcast-vector-fold.ll

llvm-svn: 44855
2007-12-11 07:29:44 +00:00
Evan Cheng
f6c2838f36 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836
2007-12-11 01:46:18 +00:00
Gordon Henriksen
aff6e2bba2 Adding Ocaml bindings for the bitreader as requested by Sarah
Thompson. Usage should be something like this:

open Llvm
open Llvm_bitreader

match read_bitcode_file fn with
  | Bitreader_failure msg ->
      prerr_endline msg
  | Bitreader_success m -> 
      ...;
      dispose_module m

Compile with: ocamlc llvm.cma llvm_bitreader.cma
              ocamlopt llvm.cmxa llvm_bitreader.cmxa

llvm-svn: 44824
2007-12-11 00:20:48 +00:00
Chris Lattner
5ca42cd342 Fix PR1850 by removing an unsafe transformation from VMCore/ConstantFold.cpp.
Reimplement the xform in Analysis/ConstantFolding.cpp where we can use
targetdata to validate that it is safe.  While I'm in there, fix some const
correctness issues and generalize the interface to the "operand folder".

llvm-svn: 44817
2007-12-10 22:53:04 +00:00
Duncan Sands
b7ac459292 Make PruneEH update the nounwind/noreturn attributes
on functions as it calculates them.

llvm-svn: 44802
2007-12-10 19:09:40 +00:00
Duncan Sands
1279851352 Fix PR1836: in the interpreter, read and write apints
using the minimum possible number of bytes.  For little
endian targets run on little endian machines, apints are
stored in memory from LSB to MSB as before.  For big endian
targets on big endian machines they are stored from MSB to
LSB which wasn't always the case before (if the target and
host endianness doesn't match values are stored according
to the host's endianness).  Doing this requires knowing the
endianness of the host, which is determined when configuring -
thanks go to Anton for this.  Only having access to little
endian machines I was unable to properly test the big endian
part, which is also the most complicated...

llvm-svn: 44796
2007-12-10 17:43:13 +00:00
Christopher Lamb
5c577eb543 Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
llvm-svn: 44785
2007-12-10 07:24:06 +00:00
Gordon Henriksen
5d201e0bcc Adding a collector name attribute to Function in the IR. These
methods are new to Function:

  bool hasCollector() const;
  const std::string &getCollector() const;
  void setCollector(const std::string &);
  void clearCollector();

The assembly representation is as such:

  define void @f() gc "shadow-stack" { ...

The implementation uses an on-the-side table to map Functions to 
collector names, such that there is no overhead. A StringPool is 
further used to unique collector names, which are extremely
likely to be unique per process.

llvm-svn: 44769
2007-12-10 03:18:06 +00:00
Gordon Henriksen
64016be9ea Upgrading this test to 2.0 .ll syntax.
llvm-svn: 44738
2007-12-09 15:03:01 +00:00
Chris Lattner
95f9743c43 Fix PR1782, patch by Wojtek Matyjewicz!
llvm-svn: 44733
2007-12-09 07:35:13 +00:00
Chris Lattner
e93a775a4d Fix a significant code quality regression I introduced on PPC64 quite
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
2007-12-08 07:04:58 +00:00
Chris Lattner
e16166b78d implement __builtin_return_addr(0) on ppc.
llvm-svn: 44700
2007-12-08 06:59:59 +00:00
Evan Cheng
34c7b35135 Much improved v8i16 shuffles. (Step 1).
llvm-svn: 44676
2007-12-07 08:07:39 +00:00