Commit Graph

11435 Commits

Author SHA1 Message Date
Cameron Zwarich
39a49276db Fix the GCC test suite issue exposed by r127477, which was caused by stack
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.

llvm-svn: 127497
2011-03-11 21:51:56 +00:00
Owen Anderson
78afadfa5d Teach FastISel to support register-immediate-immediate instructions.
llvm-svn: 127496
2011-03-11 21:33:55 +00:00
Jan Sjödin
b58b9618ce Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
llvm-svn: 127478
2011-03-11 19:37:02 +00:00
Andrew Trick
6aa37a4a2b Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
llvm-svn: 127468
2011-03-11 17:46:59 +00:00
John Wiegley
e1168a569b Fix use of CompEnd predicate to be standards conforming
The existing CompEnd predicate does not define a strict weak order as required
by the C++03 standard; therefore, its use as a predicate to std::upper_bound
is invalid. For a discussion of this issue, see
http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270

This patch replaces the asymmetrical comparison with an iterator adaptor that
achieves the same effect while being strictly standard-conforming by ensuring
an apples-to-apples comparison.

llvm-svn: 127462
2011-03-11 08:54:34 +00:00
Evan Cheng
d5d2d4a158 Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.
llvm-svn: 127440
2011-03-11 00:48:56 +00:00
Cameron Zwarich
206503113e Add an option to disable critical edge splitting in PHIElimination.
llvm-svn: 127398
2011-03-10 05:59:17 +00:00
Jakob Stoklund Olesen
92652a803f Change the Spiller interface to take a LiveRangeEdit reference.
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.

llvm-svn: 127389
2011-03-10 01:51:42 +00:00
Jakob Stoklund Olesen
70541686bf Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
llvm-svn: 127388
2011-03-10 01:21:58 +00:00
Evan Cheng
a3a7a7e364 Re-commit 127368 and 127371. They are exonerated.
llvm-svn: 127380
2011-03-10 00:16:32 +00:00
Evan Cheng
d7a2008a55 Revert 127368 and 127371 for now.
llvm-svn: 127376
2011-03-09 23:53:17 +00:00
Evan Cheng
b717770dfe Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.

llvm-svn: 127368
2011-03-09 22:47:38 +00:00
Jakob Stoklund Olesen
4d0c9d0af7 Make physreg coalescing independent on the number of uses of the virtual register.
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.

The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.

Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.

llvm-svn: 127351
2011-03-09 19:27:06 +00:00
Andrew Trick
e529ddb2d7 Improve pre-RA-sched register pressure tracking for duplicate operands.
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks

llvm-svn: 127347
2011-03-09 19:12:43 +00:00
Benjamin Kramer
4cf03850a2 Fix typo, make helper static.
llvm-svn: 127335
2011-03-09 16:19:12 +00:00
Benjamin Kramer
782cb6d68d Remove unused virtual dtor.
llvm-svn: 127331
2011-03-09 14:20:28 +00:00
Matt Beaumont-Gay
3e3b6cc819 Add a virtual dtor to Delegate to silence -Wnon-virtual-dtor
llvm-svn: 127311
2011-03-09 04:02:15 +00:00
Jakob Stoklund Olesen
eec325fc2f Add a LiveRangeEdit::Delegate protocol.
This will we used for keeping register allocator data structures up to date
while LiveRangeEdit is trimming live intervals.

llvm-svn: 127300
2011-03-09 00:57:29 +00:00
Jakob Stoklund Olesen
7905ed6549 Delete dead code.
llvm-svn: 127295
2011-03-09 00:07:39 +00:00
Jakob Stoklund Olesen
b8f5f15468 Delete dead code after rematerializing.
LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing,
splitting, and spilling for dead code elimination. It can delete chains of dead
instructions as long as there are no dependency loops.

llvm-svn: 127287
2011-03-08 22:46:11 +00:00
Jakob Stoklund Olesen
b7aa589217 Fix the build for MSVC 9 whose upper_bound() wants to compare elements in the sorted array.
Patch by Olaf Krzikalla!

llvm-svn: 127264
2011-03-08 19:37:54 +00:00
Eric Christopher
d3c7e834e8 Fix some latent bugs if the nodes are unschedulable. We'd gotten away
with this before since none of the register tracking or nightly tests
had unschedulable nodes.

This should probably be refixed with a special default Node that just
returns some "don't touch me" values.

Fixes PR9427

llvm-svn: 127263
2011-03-08 19:35:47 +00:00
Oscar Fuentes
3faa2722ef Revert "Make a comparator's argument `const'. This fixes the build for
MSVC 9."

The "fix" was meaningless.

This reverts commit r127245.

llvm-svn: 127260
2011-03-08 19:26:21 +00:00
Benjamin Kramer
872abcc8a9 Reduce vector reallocations.
llvm-svn: 127254
2011-03-08 17:28:36 +00:00
Oscar Fuentes
27fc386e64 Make a comparator's argument `const'. This fixes the build for MSVC 9.
llvm-svn: 127245
2011-03-08 13:52:07 +00:00
Andrew Trick
fd853e8757 Further improvements to pre-RA-sched=list-ilp.
This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.

llvm-svn: 127203
2011-03-08 01:51:56 +00:00
Jakob Stoklund Olesen
f9401745e0 Let shrinkToUses optionally return a list of now dead machine instructions.
llvm-svn: 127192
2011-03-07 23:29:10 +00:00
Jakob Stoklund Olesen
158af1f7e9 Make the UselessRegs argument optional in the LiveRangeEdit constructor.
llvm-svn: 127181
2011-03-07 22:42:16 +00:00
Cameron Zwarich
a1920d7f51 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
llvm-svn: 127175
2011-03-07 21:56:36 +00:00
Jakob Stoklund Olesen
68b2c1d239 Handle the special case of registers begin redefined by early-clobber defs.
In this case, the value need to be available at the load index instead of the
normal use index.

llvm-svn: 127167
2011-03-07 18:56:16 +00:00
Owen Anderson
11a49e845a Use the correct LHS type when determining the legalization of a shift's RHS type.
llvm-svn: 127163
2011-03-07 18:29:47 +00:00
Eric Christopher
1da11eb2ae Typo.
llvm-svn: 127131
2011-03-06 21:13:45 +00:00
NAKAMURA Takumi
6aa6938d66 lib/CodeGen/AsmPrinter/CMakeLists.txt: Fix CMake build, following up to r127099.
llvm-svn: 127114
2011-03-06 00:13:15 +00:00
Andrew Trick
ebbe4680ae Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.
llvm-svn: 127113
2011-03-06 00:03:32 +00:00
Anton Korobeynikov
62e48532b9 Some first rudimentary support for ARM EHABI: print exception table in "text mode".
llvm-svn: 127099
2011-03-05 18:43:15 +00:00
Anton Korobeynikov
c746be3dc4 Add FrameSetup MI flags
llvm-svn: 127098
2011-03-05 18:43:04 +00:00
Jakob Stoklund Olesen
1d0ca5680a Work around a coalescer bug.
The coalescer can in very rare cases leave too large live intervals around after
rematerializing cheap-as-a-move instructions.

Linear scan doesn't really care, but live range splitting gets very confused
when a live range is killed by a ghost instruction.

I will fix this properly in the coalescer after 2.9 branches.

llvm-svn: 127096
2011-03-05 18:33:49 +00:00
Andrew Trick
2451bad445 Be explicit with abs(). Visual Studio workaround.
llvm-svn: 127075
2011-03-05 10:29:25 +00:00
Andrew Trick
dd4a20e7d7 Fix for -sched-high-latency-cycles in sched=list-ilp mode.
llvm-svn: 127071
2011-03-05 09:18:16 +00:00
Andrew Trick
d267891a21 Missing comment.
llvm-svn: 127068
2011-03-05 08:04:11 +00:00
Andrew Trick
7db197d209 Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.

Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.

Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.

llvm-svn: 127067
2011-03-05 08:00:22 +00:00
Jakob Stoklund Olesen
52420a0a1e Rework the global split cost calculation.
The global cost is the sum of block frequencies for spill code that must be
inserted because preferences weren't met.

llvm-svn: 127062
2011-03-05 03:28:51 +00:00
Jakob Stoklund Olesen
79944a508a Compute the constraints for global live range splitting from an interference pattern.
This simplifies the code and makes it faster too.

The interference patterns are saved for each candidate register. It will be
reused for actually executing the split. Work in progress.

llvm-svn: 127054
2011-03-05 01:10:31 +00:00
Jim Grosbach
372394916e Teach the register scavenger to take subregs into account when finding a free register.
llvm-svn: 127049
2011-03-05 00:20:19 +00:00
Eric Christopher
94626fc599 Improve readability with some whitespace!
llvm-svn: 127043
2011-03-04 22:47:12 +00:00
Jakob Stoklund Olesen
87b598dd85 Extract a method. No functional change.
llvm-svn: 127040
2011-03-04 22:11:11 +00:00
Jakob Stoklund Olesen
e3b9a00584 Go back to comparing spill weights when deciding if interference can be evicted.
It gives better results. Sometimes, a live range can be large and still have
high spill weight. Such a range should not be spilled.

llvm-svn: 127036
2011-03-04 21:32:50 +00:00
Jakob Stoklund Olesen
8b66caf12a Renumber slot indexes locally when possible.
Initially, slot indexes are quad-spaced. There is room for inserting up to 3
new instructions between the original instructions.

When we run out of indexes between two instructions, renumber locally using
double-spaced indexes. The original quad-spacing means that we catch up quickly,
and we only have to renumber a handful of instructions to get a monotonic
sequence. This is much faster than renumbering the whole function as we did
before.

llvm-svn: 127023
2011-03-04 19:43:38 +00:00
Jakob Stoklund Olesen
d99d8cfdf0 Number SlotIndexes uniformly without looking at the number of defs on each instruction.
You can't really predict how many indexes will be needed from the number of
defs, so let's keep it simple.

Also remove an extra empty index that was inserted after each basic block. It
was intended for live-out ranges, but it was never used that way.

llvm-svn: 127014
2011-03-04 18:51:09 +00:00
Jakob Stoklund Olesen
dfc9b0b15f Add SlotIndex statistics.
llvm-svn: 127007
2011-03-04 18:08:29 +00:00