Commit Graph

47409 Commits

Author SHA1 Message Date
Stuart Hastings
fdc9e4af68 FGETSIGN support for x86, using movmskps/pd. Will be enabled with a
patch to TargetLowering.cpp.  rdar://problem/5660695

llvm-svn: 132388
2011-06-01 04:39:42 +00:00
Andrew Trick
fa54b35483 Add an issue width check to the postRA scheduler. Patch by Max Kazakov!
For targets with no itinerary (x86) it is a nop by default. For
targets with issue width already expressed in the itinerary (ARM) it
bypasses a scoreboard check but otherwise does not affect the
schedule. It does make the code more consistent and complete and
allows new targets to specify their issue width in an arbitrary way.

llvm-svn: 132385
2011-06-01 03:27:56 +00:00
John McCall
18921da759 First, do no harm -- even if we can't find a selector for an enclosing
landing pad, forward llvm.eh.resume calls to it instead of turning them
invalidly into invokes.

llvm-svn: 132382
2011-06-01 02:17:11 +00:00
Bill Wendling
a03522829c The ARM stuff already calls the Resume function, not the Resume_or_Rethrow. It
turns out that it could cause an infinite loop in some situations. If this code
is triggered and it converts a cleanup into a catchall, but that cleanup was in
already in a cleanup, then the _Unwind_SjLj_Resume could infinite loop. I.e.,
the code doesn't consume the exception object and passes it on to
_Unwind_SjLj_Resume. But _USjLjR expects it to be consumed (since it's landing
at a catchall instead of a cleanup). So it uses the values that are presently
there, which are the values that tell it to jump to the fake landing pad.
<rdar://problem/9508402>

llvm-svn: 132381
2011-06-01 01:49:35 +00:00
Devang Patel
4eab0639a4 Incomplete type may not have corresponding DIE, so do not check DIEEntry eagerly.
llvm-svn: 132377
2011-06-01 00:23:24 +00:00
Devang Patel
4077aa90ed Refactor.
llvm-svn: 132373
2011-05-31 23:30:30 +00:00
Devang Patel
a9f6a46390 Include global types, that are referenced through local variables, in debug_pubtypes list.
llvm-svn: 132371
2011-05-31 22:56:51 +00:00
Andrew Trick
60ad58febd scev: Better sign-extend removal. Normalize postincrement recurrences
so that their sign extended forms are congruent when no overflow occurs.

llvm-svn: 132360
2011-05-31 21:17:47 +00:00
Jakob Stoklund Olesen
a1976f5898 Simplify the eviction policy by making the failsafe explicit.
When assigned ranges are evicted, they are put in the RS_Evicted stage and are
not allowed to evict anything else. That prevents looping automatically.

When evicting ranges just to get a cheaper register, use only spill weights to
find the possible candidates. Avoid breaking hints for this purpose, it is not
worth it.

Start implementing more complex eviction heuristics, guarded by the temporary
-complex-eviction flag. The initial version permits a heavier range to be
evicted if it doesn't have any uses where the evicting range is live. This makes
it a good candidate for live ranfge splitting.

llvm-svn: 132358
2011-05-31 21:02:44 +00:00
Eli Friedman
05fea3b4a2 llvm.memcpy.* has two distinct associated address spaces; the source address space, and the destination address space. Fix up the interface on MemIntrinsic and MemTransferInst to make this clear, and fix InstructionDereferencesPointer in LazyValueInfo.cpp to use the interface properly.
llvm-svn: 132356
2011-05-31 20:40:16 +00:00
Bruno Cardoso Lopes
9231127d37 Fix uninitialized variables and silence warnings
llvm-svn: 132355
2011-05-31 20:25:26 +00:00
Eli Friedman
3c6167ed29 Add a minor missing -verify check. Found by inspection.
llvm-svn: 132353
2011-05-31 20:12:07 +00:00
Stuart Hastings
47cbd200e4 Revert to pacify a buildbot. rdar://problem/6501862
llvm-svn: 132351
2011-05-31 19:56:35 +00:00
Stuart Hastings
e226ec461c Followup to 132316; accept arbitrary constants, add with a constant,
sub with a non-constant.  Fix comments, enlarge test case.
rdar://problem/6501862

llvm-svn: 132348
2011-05-31 19:29:55 +00:00
Richard Osborne
660fe84614 Fix 80 column violations.
llvm-svn: 132341
2011-05-31 16:30:33 +00:00
Richard Osborne
4293c93896 Add XCore intrinsic for crc8.
llvm-svn: 132340
2011-05-31 16:24:49 +00:00
Richard Osborne
34a4652dcd Add XCore intrinsic for crc32.
llvm-svn: 132336
2011-05-31 14:47:36 +00:00
Bruno Cardoso Lopes
0bdb365634 Fix ssat and ssat16 encodings for ARM and Thumb. The bit position value
must be encoded decremented by one. Only add encoding tests for ssat16
because ssat can't be parsed yet.

llvm-svn: 132324
2011-05-31 03:33:27 +00:00
Bruno Cardoso Lopes
728ea362c3 This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes
f6fa29e7a1 This patch implements the thread local storage. Implemented are General
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

llvm-svn: 132322
2011-05-31 02:53:58 +00:00
Rafael Espindola
33f7d7f9fa Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

llvm-svn: 132317
2011-05-30 20:20:15 +00:00
Stuart Hastings
9f37a92c33 (1 - X) * (-2) -> (x - 1) * 2, for all positive nonzero powers of 2
rdar://problem/6501862

llvm-svn: 132316
2011-05-30 20:00:33 +00:00
Rafael Espindola
13607c5e91 Split ppc dwarf regnums into ppc64 and ppc32 flavours.
llvm-svn: 132315
2011-05-30 18:24:44 +00:00
Rafael Espindola
5917c1f6ec Introduce the DwarfRegAlias class for declaring that two registers have the
same dwarf number. This will be used for creating a dwarf number to register
mapping.

The only case that needs this so far is the XMM/YMM registers that unfortunately
do have the same numbers.

llvm-svn: 132314
2011-05-30 17:49:59 +00:00
Rafael Espindola
00ba4a56e0 Mark the 32 bit registers as invalid in 64 bit mode. In 64 bit mode they are
subregisters of the 64 bit ones.

llvm-svn: 132313
2011-05-30 16:04:54 +00:00
Rafael Espindola
33338e912b Remove the DwarfNumbers from the subregisters. They should use DW_OP_bit_piece
and for now the generic dwarf emission will automatically use the superregister
numbers.

llvm-svn: 132312
2011-05-30 15:56:04 +00:00
Jakob Stoklund Olesen
1c8d54ed9f Reapply r132245 with a fix for the bug that broke the darwin9/i386 build.
llvm-svn: 132309
2011-05-30 01:33:26 +00:00
Charles Davis
52d44a8a21 Emit the handler's data area. For GCC-style exceptions under Win64, the
handler's data area starts with a 4-byte reference to the personality
function, followed by the DWARF LSDA.

llvm-svn: 132302
2011-05-30 00:13:34 +00:00
Jakob Stoklund Olesen
939fb6f738 Revert r132245, "Create two BlockInfo entries when a live range is discontinuous through a block."
This commit seems to have broken a darwin 9 tester.

llvm-svn: 132299
2011-05-29 21:24:39 +00:00
Jakob Stoklund Olesen
49bf4dd965 Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.

The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.

llvm-svn: 132298
2011-05-29 20:10:28 +00:00
John McCall
64ff21faa7 On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

Take 2, now with more basic competence.

llvm-svn: 132295
2011-05-29 19:50:32 +00:00
John McCall
645e5b19b7 ...this is not a good commit day for me.
llvm-svn: 132294
2011-05-29 19:44:55 +00:00
John McCall
ffdb2d5e70 I didn't mean to commit these residues of a personal project.
llvm-svn: 132293
2011-05-29 19:41:56 +00:00
John McCall
46c7b963b2 On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

llvm-svn: 132291
2011-05-29 19:39:04 +00:00
Nick Lewycky
58d87d5490 Don't crash owhen ComputeLoadResult can't compute the result of the load.
llvm-svn: 132290
2011-05-29 19:33:36 +00:00
Nick Lewycky
07ed4434b8 Obey the isVolatile bit on memory intrinsics when analyzing uses of a global
variable. Noticed by inspection.

Simulate memset in EvaluateFunction where the target of the memset and the
value we're setting are both the null value. Fixes PR10047!

llvm-svn: 132288
2011-05-29 18:41:56 +00:00
Nadav Rotem
77b328bd14 Fix warnings due to 132263; Thanks rdivacky.
llvm-svn: 132285
2011-05-29 08:10:47 +00:00
Charles Davis
850e4b68b1 When generating against the Win64 EH scheme, set the handler to the GCC-specific
handler.

At this moment, only GCC-style exceptions are supported. Other kinds
of exceptions, including "traditional" SEH and Microsoft Visual C++ exceptions,
need more work--and an compiler exception model that isn't specific to
GCC-style exceptions!

In particular, I imagine that it would be possible to mix "traditional" SEH
with GCC-style EH or Microsoft C++ EH. Currently LLVM has no way (beyond some
target-specific defaults and whole-module compiler switches) of knowing which
scheme to use when.

llvm-svn: 132283
2011-05-29 04:28:35 +00:00
Rafael Espindola
bfde930279 Fix to match the dwarf register numbers that gdb uses.
llvm-svn: 132278
2011-05-29 03:58:16 +00:00
Rafael Espindola
06c8318a60 Dwarf register 0 is r0, remove incorrect entries.
llvm-svn: 132276
2011-05-29 03:17:01 +00:00
John McCall
233946583f Fix this to work correctly with phis; test case to follow if this successfully
fixes self-host.

llvm-svn: 132275
2011-05-29 03:01:09 +00:00
Rafael Espindola
51a8fe13bc Remove the dwarf numbers from the D registers. They don't have dwarf numbers
and should probably be encoded as

DW_OP_reg 32 DW_OP_piece 4 DW_OP_reg 33

llvm-svn: 132274
2011-05-29 02:21:01 +00:00
Cameron Zwarich
72e034c331 Fix ARM fast isel to correctly flag memory operands to stores. This fixes
-verify-machineinstrs failures on several tests.

llvm-svn: 132268
2011-05-28 20:34:49 +00:00
Nadav Rotem
63c8747adf Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).

llvm-svn: 132263
2011-05-28 17:57:14 +00:00
Benjamin Kramer
ffcbcb72ef Erase instructions _after_ checking their type.
llvm-svn: 132256
2011-05-28 11:48:37 +00:00
Benjamin Kramer
129192d295 ConstantFoldInstOperands doesn't like compares, hand it off to instsimplify instead.
Fixes PR10040.

llvm-svn: 132254
2011-05-28 10:16:58 +00:00
John McCall
119a0222f5 Implement and document the llvm.eh.resume intrinsic, which is
transformed by the inliner into a branch to the enclosing landing pad
(when inlined through an invoke).  If not so optimized, it is lowered
DWARF EH preparation into a call to _Unwind_Resume (or _Unwind_SjLj_Resume
as appropriate).  Its chief advantage is that it takes both the
exception value and the selector value as arguments, meaning that there
is zero effort in recovering these;  however, the frontend is required
to pass these down, which is not actually particularly difficult.

Also document the behavior of landing pads a bit better, and make it
clearer that it's okay that personality functions don't always land at
landing pads.  This is just a fact of life.  Don't write optimizations that
rely on pushing things over an unwind edge.

llvm-svn: 132253
2011-05-28 07:45:59 +00:00
Charles Davis
6702c786ed When generating code for Win64 EH, emit StartProc and EndProc directives.
llvm-svn: 132250
2011-05-28 04:21:04 +00:00
Bruno Cardoso Lopes
6d5e369a10 Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
2011-05-28 04:07:29 +00:00
Eric Christopher
a2fa6edef9 This actually starts at offset 0, not 1.
llvm-svn: 132246
2011-05-28 03:16:22 +00:00