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482cfa14e2
Add disassembly support for the movw, adiw, and sbiw instructions. I had previously committed test cases for the adiw and sbiw instructions, but had accidentally made them not runnable so they were skipped all this time. Oops. This patch fixes that by adding support for disassembling those instructions. Differential Revision: https://reviews.llvm.org/D82093
312 lines
11 KiB
C++
312 lines
11 KiB
C++
//===- AVRDisassembler.cpp - Disassembler for AVR ---------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is part of the AVR Disassembler.
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//
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//===----------------------------------------------------------------------===//
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#include "AVR.h"
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#include "AVRRegisterInfo.h"
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#include "AVRSubtarget.h"
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#include "MCTargetDesc/AVRMCTargetDesc.h"
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#include "TargetInfo/AVRTargetInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCDisassembler/MCDisassembler.h"
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#include "llvm/MC/MCFixedLenDisassembler.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "avr-disassembler"
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typedef MCDisassembler::DecodeStatus DecodeStatus;
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namespace {
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/// A disassembler class for AVR.
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class AVRDisassembler : public MCDisassembler {
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public:
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AVRDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
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: MCDisassembler(STI, Ctx) {}
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virtual ~AVRDisassembler() {}
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DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &CStream) const override;
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};
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}
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static MCDisassembler *createAVRDisassembler(const Target &T,
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const MCSubtargetInfo &STI,
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MCContext &Ctx) {
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return new AVRDisassembler(STI, Ctx);
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRDisassembler() {
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// Register the disassembler.
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TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(),
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createAVRDisassembler);
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}
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static const uint16_t GPRDecoderTable[] = {
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AVR::R0, AVR::R1, AVR::R2, AVR::R3,
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AVR::R4, AVR::R5, AVR::R6, AVR::R7,
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AVR::R8, AVR::R9, AVR::R10, AVR::R11,
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AVR::R12, AVR::R13, AVR::R14, AVR::R15,
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AVR::R16, AVR::R17, AVR::R18, AVR::R19,
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AVR::R20, AVR::R21, AVR::R22, AVR::R23,
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AVR::R24, AVR::R25, AVR::R26, AVR::R27,
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AVR::R28, AVR::R29, AVR::R30, AVR::R31,
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};
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static DecodeStatus DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, const void *Decoder) {
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if (RegNo > 31)
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return MCDisassembler::Fail;
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unsigned Register = GPRDecoderTable[RegNo];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeLD8RegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, const void *Decoder) {
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if (RegNo > 15)
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return MCDisassembler::Fail;
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unsigned Register = GPRDecoderTable[RegNo+16];
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Inst.addOperand(MCOperand::createReg(Register));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodePTRREGSRegisterClass(MCInst &Inst, unsigned RegNo,
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uint64_t Address, const void *Decoder) {
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// Note: this function must be defined but does not seem to be called.
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assert(false && "unimplemented: PTRREGS register class");
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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#include "AVRGenDisassemblerTables.inc"
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static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned addr = 0;
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addr |= fieldFromInstruction(Insn, 0, 4);
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addr |= fieldFromInstruction(Insn, 9, 2) << 4;
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unsigned reg = fieldFromInstruction(Insn, 4, 5);
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Inst.addOperand(MCOperand::createImm(addr));
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if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned addr = 0;
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addr |= fieldFromInstruction(Insn, 0, 4);
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addr |= fieldFromInstruction(Insn, 9, 2) << 4;
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unsigned reg = fieldFromInstruction(Insn, 4, 5);
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if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createImm(addr));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned addr = fieldFromInstruction(Insn, 3, 5);
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unsigned b = fieldFromInstruction(Insn, 0, 3);
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Inst.addOperand(MCOperand::createImm(addr));
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Inst.addOperand(MCOperand::createImm(b));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Field,
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uint64_t Address, const void *Decoder) {
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// Call targets need to be shifted left by one so this needs a custom
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// decoder.
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Inst.addOperand(MCOperand::createImm(Field << 1));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned d = fieldFromInstruction(Insn, 4, 5);
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if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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if (decodeFRd(Inst, Insn, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(AVR::R31R30));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned d = fieldFromInstruction(Insn, 4, 3) + 16;
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unsigned r = fieldFromInstruction(Insn, 0, 3) + 16;
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if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned r = fieldFromInstruction(Insn, 4, 4) * 2;
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unsigned d = fieldFromInstruction(Insn, 0, 4) * 2;
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if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned d = fieldFromInstruction(Insn, 4, 2) * 2 + 24; // starts at r24:r25
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unsigned k = 0;
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k |= fieldFromInstruction(Insn, 0, 4);
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k |= fieldFromInstruction(Insn, 6, 2) << 4;
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if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createImm(k));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder) {
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unsigned rd = fieldFromInstruction(Insn, 4, 4) + 16;
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unsigned rr = fieldFromInstruction(Insn, 0, 4) + 16;
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if (DecodeGPR8RegisterClass(Inst, rd, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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if (DecodeGPR8RegisterClass(Inst, rr, Address, Decoder) == MCDisassembler::Fail)
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address,
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uint64_t &Size, uint32_t &Insn) {
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if (Bytes.size() < 2) {
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Size = 0;
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return MCDisassembler::Fail;
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}
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Size = 2;
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Insn = (Bytes[0] << 0) | (Bytes[1] << 8);
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return MCDisassembler::Success;
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}
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static DecodeStatus readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address,
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uint64_t &Size, uint32_t &Insn) {
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if (Bytes.size() < 4) {
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Size = 0;
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return MCDisassembler::Fail;
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}
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Size = 4;
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Insn = (Bytes[0] << 16) | (Bytes[1] << 24) | (Bytes[2] << 0) | (Bytes[3] << 8);
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return MCDisassembler::Success;
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}
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static const uint8_t *getDecoderTable(uint64_t Size) {
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switch (Size) {
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case 2: return DecoderTable16;
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case 4: return DecoderTable32;
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default: llvm_unreachable("instructions must be 16 or 32-bits");
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}
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}
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DecodeStatus AVRDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address,
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raw_ostream &CStream) const {
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uint32_t Insn;
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DecodeStatus Result;
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// Try decode a 16-bit instruction.
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{
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Result = readInstruction16(Bytes, Address, Size, Insn);
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if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
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// Try to auto-decode a 16-bit instruction.
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Result = decodeInstruction(getDecoderTable(Size), Instr,
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Insn, Address, this, STI);
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if (Result != MCDisassembler::Fail)
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return Result;
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}
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// Try decode a 32-bit instruction.
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{
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Result = readInstruction32(Bytes, Address, Size, Insn);
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if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
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Result = decodeInstruction(getDecoderTable(Size), Instr, Insn,
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Address, this, STI);
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if (Result != MCDisassembler::Fail) {
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return Result;
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}
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return MCDisassembler::Fail;
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}
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}
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typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address,
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const void *Decoder);
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