llvm-mirror/test/MC
Matt Arsenault e1c15e3b3d AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16
The 16 bank LDS case is complicated due to using multiple
instructions. If I attempt to write a pattern for it, the generated
selector incorrectly places the copy to m0 after the first
instruction, so that needs to be separately addressed.

Also fix not gluing the copy to m0 to the second operation in the
second half of the 16 bank lowering.
2020-01-15 08:58:58 -05:00
..
AArch64
AMDGPU
ARM
AsmParser
AVR
BPF
COFF
Disassembler
ELF
Hexagon
Lanai
MachO
Mips
MSP430
PowerPC
RISCV
Sparc
SystemZ
WebAssembly
X86