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4b218d0f3e
A sequence of additions or multiplications that is known not to wrap, may wrap if it's order is changed (i.e., reassociated). Therefore when vectorizing integer sum or product reductions, their no-wrap flags need to be removed. Fixes PR43828 Patch by Denis Antrushin Differential Revision: https://reviews.llvm.org/D69563
74 lines
2.6 KiB
LLVM
74 lines
2.6 KiB
LLVM
; RUN: opt < %s -force-vector-width=4 -force-vector-interleave=1 -loop-vectorize -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; CHECK-LABEL: @PR34687(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %[[LATCH:.*]] ]
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ [[TMP17:%.*]], %[[LATCH]] ]
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; CHECK: [[LATCH]]:
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; CHECK: [[TMP13:%.*]] = and <4 x i32> [[VEC_PHI]], <i32 255, i32 255, i32 255, i32 255>
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; CHECK-NEXT: [[TMP14:%.*]] = add <4 x i32> [[TMP13]], {{.*}}
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; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4
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; CHECK: [[TMP16:%.*]] = trunc <4 x i32> [[TMP14]] to <4 x i8>
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; CHECK-NEXT: [[TMP17]] = zext <4 x i8> [[TMP16]] to <4 x i32>
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; CHECK-NEXT: br i1 {{.*}}, label %middle.block, label %vector.body
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;
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define i8 @PR34687(i1 %c, i32 %x, i32 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i32 [ 0, %entry ], [ %i.next, %if.end ]
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%r = phi i32 [ 0, %entry ], [ %r.next, %if.end ]
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br i1 %c, label %if.then, label %if.end
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if.then:
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%tmp0 = sdiv i32 undef, undef
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br label %if.end
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if.end:
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%tmp1 = and i32 %r, 255
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%i.next = add nsw i32 %i, 1
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%r.next = add nuw nsw i32 %tmp1, %x
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%cond = icmp eq i32 %i.next, %n
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br i1 %cond, label %for.end, label %for.body
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for.end:
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%tmp2 = phi i32 [ %r.next, %if.end ]
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%tmp3 = trunc i32 %tmp2 to i8
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ret i8 %tmp3
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}
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; CHECK-LABEL: @PR35734(
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; CHECK: vector.ph:
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; CHECK: [[TMP3:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %y, i32 0
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; CHECK-NEXT: br label %vector.body
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ [[TMP3]], %vector.ph ], [ [[TMP9:%.*]], %vector.body ]
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; CHECK: [[TMP5:%.*]] = and <4 x i32> [[VEC_PHI]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[TMP5]], <i32 -1, i32 -1, i32 -1, i32 -1>
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; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4
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; CHECK: [[TMP8:%.*]] = trunc <4 x i32> [[TMP6]] to <4 x i1>
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; CHECK-NEXT: [[TMP9]] = sext <4 x i1> [[TMP8]] to <4 x i32>
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; CHECK-NEXT: br i1 {{.*}}, label %middle.block, label %vector.body
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;
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define i32 @PR35734(i32 %x, i32 %y) {
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entry:
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br label %for.body
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for.body:
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%i = phi i32 [ %x, %entry ], [ %i.next, %for.body ]
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%r = phi i32 [ %y, %entry ], [ %r.next, %for.body ]
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%tmp0 = and i32 %r, 1
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%r.next = add i32 %tmp0, -1
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%i.next = add nsw i32 %i, 1
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%cond = icmp sgt i32 %i, 77
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br i1 %cond, label %for.end, label %for.body
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for.end:
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%tmp1 = phi i32 [ %r.next, %for.body ]
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ret i32 %tmp1
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}
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